ISL62386 Datasheet, PDF (16/20 Pages) Intersil Corporation – High-Efficiency, Quad Output System Power Supply Controller for Notebook Computers

ISL62386
The LC output filter has a double pole at its resonant frequency
that causes rapid phase change. The R³ modulator used in the
ISL62386 makes the LC output filter resemble a first order
system in which the closed loop stability can be achieved with
the recommended Type-II compensation network. Intersil
provides a PC-based tool that can be used to calculate
compensation network component values and help simulate
the loop frequency response.
LDO5 Linear Regulator
In addition to the two SMPS outputs, the ISL62386 also
provides two linear regulator outputs. LDO5 is fixed 5V LDO
output capable of sourcing 100mA continuous current.
When the output of SMPS2 is programmed to 5V, SMPS2 will
automatically take over the load of LDO5. This provides a
large power savings and boosts the efficiency. After
switchover to SMPS2, the LDO5 output current plus the
MOSFET drive current should not exceed 100mA in order to
guarantee the LDO5 output voltage in the range of 5V ±5%.
The total MOSFET drive current can be estimated by
Equation 16.
I_DRIVE = Q_g ⋅ F_SW
(EQ. 16)
where Q_g is the total gate charge of all the power MOSFET
in two SMPS regulators. Then the LDO5 output load current
should be less than (100mA - I_DRIVE).
LDO3 Linear Regulator
ISL62386 includes LDO3 linear regulator whose output is fixed
3.3V. It can be independently enabled from both SMPS
channels. Logic high of LDO3EN will enable LDO3. LDO3 is
capable of sourcing 100mA continuous current. Currents in
excess of the limit will cause the LDO3 voltage to drop
dramatically, limiting the power dissipation.
Thermal Monitor and Protection
LDO3 and LDO5 can dissipate non-trivial power inside the
ISL62386 at high input-to-output voltage ratios and full load
conditions. To protect the silicon, ISL62386 continually
monitors the die temperature. If the temperature exceeds
+150°C, all outputs will be turned off to sharply curtail power
dissipation. The outputs will remain off until the junction
temperature has fallen below +135°C.
General Application Design Guide
This design guide is intended to provide a high-level
explanation of the steps necessary to design a single-phase
power converter. It is assumed that the reader is familiar with
many of the basic skills and techniques referenced in the
following section. In addition to this guide, Intersil provides
complete reference designs that include schematics, bills of
materials, and example board layouts.
Selecting the LC Output Filter
The duty cycle of an ideal buck converter is a function of the
input and the output voltage. This relationship is written as
Equation 17:
D
=
-^V----^O----^U----^T--
V_IN
(EQ. 17)
The output inductor peak-to-peak ripple current is written as
Equation 18:
I_PP
=
V_{-----O----U----T-----}•_--(_---1_{----–-----}D_-----)
F_SW • L
(EQ. 18)
A typical step-down DC/DC converter will have an I_P-P of
20% to 40% of the maximum DC output load current. The
value of I_P-P is selected based upon several criteria such as
MOSFET switching loss, inductor core loss, and the resistive
loss of the inductor winding. The DC copper loss of the
inductor can be estimated by Equation 19:
P_COPPER = I_LOAD2 • DCR
(EQ. 19)
Where I_LOAD is the converter output DC current.
The copper loss can be significant so attention has to be given
to the DCR selection. Another factor to consider when choosing
the inductor is its saturation characteristics at elevated
temperatures. A saturated inductor could cause destruction of
circuit components, as well as nuisance OCP faults.
A DC/DC buck regulator must have output capacitance C_O
into which ripple current I_P-P can flow. Current I_P-P develops
out of the capacitor. These two voltages are written as
Equation 20:
ΔV_ESR = I_{P – P} • ESR
(EQ. 20)
and Equation 21:
ΔV_C
=
---------^I--^P-----^–----^P-----------
8
•
C_O
•
F
S
W
(EQ. 21)
If the output of the converter has to support a load with high
pulsating current, several capacitors will need to be paralleled
to reduce the total ESR until the required V_P-P is achieved.
The inductance of the capacitor can cause a brief voltage dip
if the load transient has an extremely high slew rate. Low
inductance capacitors should be considered in this scenario.
A capacitor dissipates heat as a function of RMS current and
frequency. Be sure that I_P-P is shared by a sufficient quantity
of paralleled capacitors so that they operate below the
maximum rated RMS current at F_SW. Take into account that
the rated value of a capacitor can fade as much as 50% as
the DC voltage across it increases.
Selection of the Input Capacitor
The important parameters for the bulk input capacitance are
the voltage rating and the RMS current rating. For reliable
operation, select bulk capacitors with voltage and current
ratings above the maximum input voltage and capable of
supplying the RMS current required by the switching circuit.
Their voltage rating should be at least 1.25x greater than the
16
FN6831.0
February 4, 2009