English
Language : 

ISL6556B Datasheet, PDF (14/24 Pages) Intersil Corporation – Optimized Multi-Phase PWM Controller with 6-Bit DAC and Programmable Internal Temperature Compensation for VR10.X Application
ISL6556B
The magnitude of the spike is dictated by the ESR and ESL
of the output capacitors selected. By positioning the no-load
voltage level near the upper specification limit, a larger
negative spike can be sustained without crossing the lower
limit. By adding a well controlled output impedance, the
output voltage under load can effectively be level shifted
down so that a larger positive spike can be sustained without
crossing the upper specification limit.
As shown in Figure 5, a current proportional to the average
current in all active channels, IAVG, flows from FB through a
load-line regulation resistor, RFB. The resulting voltage drop
across RFB is proportional to the output current, effectively
creating an output voltage droop with a steady-state value
defined as
VDROOP = IAVG RFB
(EQ. 5)
In most cases, each channel uses the same RISEN value to
sense current. A more complete expression for VDROOP is
derived by combining equations 4 and 5.
VDROOP
=
-I-O-----U----T--
N
r---D----S----(--O-----N----)
RISEN
RFB
(EQ. 6)
VDIFF
DYNAMIC
VID D/A
RFB
E/A
FB
VCC
OR
GND
ROFS
OFS
ISL6556BCB
+
0.5V
-
-
2.0V
+
GND
VCC
FIGURE 6. OUTPUT VOLTAGE OFFSET PROGRAMMING
WITH ISL6556BCB (28-LEAD SOIC)
Output-Voltage Offset Programming
The ISL6556B allows the designer to accurately adjust the
offset voltage. When a resistor, ROFS, is connected between
OFS and VCC, the voltage across it is regulated to 2.0V. This
causes a proportional current (IOFS) to flow into OFS. If ROFS
is connected to ground, the voltage across it is regulated to
0.5V, and IOFS flows out of OFS. The offset current flowing
through the resistor between VDIFF and FB will generate the
desired offset voltage which is equal to the product (IOFS x
RFB). These functions are shown in Figures 6 and 7.
As evident in Figure 7, the OFSOUT pin must be connected
to the FB pin for this current injection to function in
ISL6556BCR. The current flow through RFB creates an offset
at the REF pin, which is ultimately duplicated at the output of
the regulator.
Once the desired output offset voltage has been determined,
use the following formulas to set ROFS:
For Positive Offset (connect ROFS to GND):
ROFS
=
-0---.--5-----×----R-----F----B--
VOFFSET
(EQ. 7)
For Negative Offset (connect ROFS to VCC):
ROFS
=
---2-----×-----R-----F---B-----
VOFFSET
(EQ. 8)
VDIFF
RFB
DYNAMIC
VID D/A
E/A
FB
OFSOUT
VCC
OR
GND
ROFS
OFS
ISL6556BCR
+
0.5V
-
-
2.0V
+
GND
VCC
FIGURE 7. OUTPUT VOLTAGE OFFSET PROGRAMMING
WITH ISL6556BCR (32-LEAD QFN)
Dynamic VID
Modern microprocessors need to make changes to their core
voltage as part of normal operation. They direct the core-
voltage regulator to do this by making changes to the VID
inputs during regulator operation. The power management
solution is required to monitor the DAC inputs and respond to
14
FN9097.4
December 28, 2004