ISL12032 Datasheet, PDF (13/26 Pages) Intersil Corporation – Low Power RTC with Battery Backed SRAM and 50/60 Cycle AC Input and Xtal Back-up

ISL12032
TABLE 1. REGISTER MEMORY MAP (X indicates writes to these bits have no effect on the device) (Continued)
BIT
REG
ADDR SECTION NAME
7
6
5
4
3
2
1
0
RANGE DEFAULT
23h
SCA1
ESCA1 SCA122 SCA121 SCA120 SCA113 SCA112 SCA111 SCA110 0 to 59
00h
24h
MNA1 EMNA1 MNA122 MNA121 MNA120 MNA113 MNA112 MNA111 MNA110 0 to 59
00h
25h
HRA1 EHRA1
0
HRA121 HRA120 HRA113 HRA112 HRA111 HRA110 0 to 23
00h
Alarm1
26h
DTA1
EDTA1
0
DTA121 DTA120 DTA113 DTA112 DTA111 DTA110 1 to 31
01h
27h
MOA1 EMOA1
0
0
MOA120 MOA113 MOA112 MOA111 MOA110 1 to12
01h
28h
DWA1 EDWA1
0
0
0
0
DWA12 DWA11 DWA10
0 to 6
00h
29h
SCVB
X
SCBV22 SCBV21 SCBV20 SCVB13 SCVB12 SCVB11 SCVB10 0 to 59
00h
2Ah
MNVB
X
MNVB22 MNVB21 MNVB20 MNVB13 MNVB12 MNVB11 MNVB10 0 to 59
00h
2Bh TSV2B HRVB
MILVB
X
HRVB21 HRVB20 HRVB13 HRVB12 HRVB11 HRVB10 0 to 23
00h
2Ch
DTVB
X
X
DTVB21 DTVB20 DTVB13 DTVB12 DTVB11 DTVB10 1 to 31
00h
2Dh
MOVB
X
X
X
MOVB20 MOVB13 MOVB12 MOVB11 MOVB10 1 to 12
00h
2Eh
SCBV
X
SCBV22 SCBV21 SCBV20 SCBV13 SCBV12 SCBV11 SCBV10 0 to 59
00h
2Fh
MNBV
X
MNBV22 MNBV21 MNBV20 MNBV13 MNBV12 MNBV11 MNBV10 0 to 59
00h
30h TSB2V HRBV
MILBV
X
HRBV21 HRBV20 HRBV13 HRBV12 HRBV11 HRBV10 0 to 23
00h
31h
DTBV
X
X
DTBV21 DTBV20 DTBV13 DTBV12 DTBV11 DTBV10 1 to 31
00h
32h
MOBV
X
X
X
MOBV20 MOBV13 MOBV12 MOBV11 MOBV10 1 to 12
00h
33h
SCT
X
SCT22
SCT21
SCT20
SCT13
SCT12 SCT111 SCT10
0 to 59
00h
34h
MNT
X
MNT22 MNT21 MNT20 MNT13 MNT12 MNT11 MNT10 0 to 59
00h
35h TSEVT
HRT
MILT
X
HRT21 HRT20 HRT13 HRT12 HRT11 HRT10 0 to 23
00h
36h
DTT
X
X
DTT21
DTT20
DTT13
DTT12
DTT11
DTT10
1 to 31
00h
37h
MOT
X
X
X
MOT20 MOT13 MOT12 MOT11 MOT10 1 to 12
00h
Real Time Clock Registers
Addresses [00h to 07h]
RTC REGISTERS (SC, MN, HR, DT, MO, YR, DW, SS)
These registers depict BCD representations of the time. As
such, SC (Seconds) and MN (Minutes) range from 0 to 59, HR
(Hour) can be either 12-hour or 24-hour mode, DT (Date) is 1
to 31, MO (Month) is 1 to 12, YR (Year) is 0 to 99, DW (Day of
the Week) is 0 to 6, and SS (Sub-Second) is 0 to 9. The Sub-
Second register is read-only and will clear to “0” count each
time there is a write to a register in the RTC section.
The DW register provides a Day of the Week status and uses
three bits DW2 to DW0 to represent the seven days of the
week. The counter advances in the cycle 0-1-2-3-4-5-6-0-1-
2.... The assignment of a numerical value to a specific day of
the week is arbitrary and may be decided by the system
software designer. The default value is defined as “0”.
24 HOUR TIME
If the MIL bit of the HR register is “1”, the RTC uses a
24-hour format. If the MIL bit is “0”, the RTC uses a 12-hour
format and HR21 bit functions as an AM/PM indicator with a
“1” representing PM. The clock defaults to 12-hour format
time with HR21 = “0”.
LEAP YEARS
Leap years add the day February 29 and are defined as those
years that are divisible by 4. Years divisible by 100 are not leap
years, unless they are also divisible by 400. This means that
the year 2000 is a leap year and the year 2100 is not. The
ISL12032 does not correct for the leap year in the year 2100.
Status Registers (SR)
Addresses [08h to 09h]
The Status Registers consist of the DC and AC status
registers (see Tables 2 and 3).
Status Register (SRDC)
The Status Register DC is located in the memory map at
address 08h. This is a volatile register that provides status of
RTC failure (RTCF), Battery Level Monitor (LBAT85,
LBAT75), V_DD level monitor (LVDD), Alarm0 or Alarm1
trigger, Daylight Saving Time adjustment, and Battery active
mode.
13
FN6618.2
April 16, 2009