ISL6312A_15 Datasheet, PDF (12/36 Pages) Intersil Corporation – Four-Phase Buck PWM Controller with Integrated MOSFET Drivers for Intel VR10,VR11, and AMD Applications

ISL6312A
of N symmetrically phase-shifted inductor currents in
Equation 2. Peak-to-peak ripple current decreases by an
amount proportional to the number of channels. Output
voltage ripple is a function of capacitance, capacitor
equivalent series resistance (ESR), and inductor ripple
current. Reducing the inductor ripple current allows the
designer to use fewer or less costly output capacitors.
I_{C, P-P}= ^---V----^I--^N-----^–-----N-L-----^-_---fV-_S---^O--_---^U-V---^T-_I--_N-^---^----V----^O----^U-----^T-
(EQ. 2)
Another benefit of interleaving is to reduce input ripple
current. Input capacitance is determined in part by the
maximum input ripple current. Multiphase topologies can
improve overall system cost and size by lowering input ripple
current and allowing the designer to reduce the cost of input
capacitance. The example in Figure 2 illustrates input
currents from a three-phase converter combining to reduce
the total input ripple current.
The converter depicted in Figure 2 delivers 1.5V to a 36A load
from a 12V input. The RMS input capacitor current is 5.9A.
Compare this to a single-phase converter also stepping down
12V to 1.5V at 36A. The single-phase converter has 11.9A
RMS input capacitor current. The single-phase converter
must use an input capacitor bank with twice the RMS current
capacity as the equivalent three-phase converter.
INPUT-CAPACITOR CURRENT, 10A/DIV
CHANNEL 3
INPUT CURRENT
10A/DIV
CHANNEL 2
INPUT CURRENT
10A/DIV
CHANNEL 1
INPUT CURRENT
10A/DIV
1s/DIV
FIGURE 2. CHANNEL INPUT CURRENTS AND
INPUT-CAPACITOR RMS CURRENT FOR
3-PHASE CONVERTER
Active Pulse Positioning (APP) Modulated PWM
Operation
The ISL6312A uses a proprietary Active Pulse Positioning
(APP) modulation scheme to control the internal PWM
signals that command each channel’s driver to turn their
upper and lower MOSFETs on and off. The time interval in
which a PWM signal can occur is generated by an internal
clock, whose cycle time is the inverse of the switching
frequency set by the resistor between the FS pin and
ground. The advantage of Intersil’s proprietary Active Pulse
Positioning (APP) modulator is that the PWM signal has the
ability to turn on at any point during this PWM time interval,
and turn off immediately after the PWM signal has
transitioned high. This is important because is allows the
controller to quickly respond to output voltage drops
associated with current load spikes, while avoiding the ring
back affects associated with other modulation schemes.
The PWM output state is driven by the position of the error
amplifier output signal, V_COMP, minus the current correction
signal relative to the proprietary modulator ramp waveform
as illustrated in Figure 3. At the beginning of each PWM time
interval, this modified V_COMP signal is compared to the
internal modulator waveform. As-long-as the modified
V_COMP voltage is lower then the modulator waveform
voltage, the PWM signal is commanded low. The internal
MOSFET driver detects the low state of the PWM signal and
turns off the upper MOSFET and turns on the lower
synchronous MOSFET. When the modified V_COMP voltage
crosses the modulator ramp, the PWM output transitions
high, turning off the synchronous MOSFET and turning on
the upper MOSFET. The PWM signal will remain high until
the modified V_COMP voltage crosses the modulator ramp
again. When this occurs the PWM signal will transition low
again.
During each PWM time interval the PWM signal can only
transition high once. Once PWM transitions high it can not
transition high again until the beginning of the next PWM
time interval. This prevents the occurrence of double PWM
pulses occurring during a single period.
To further improve the transient response, the ISL6312A
also implements Intersil’s proprietary Adaptive Phase
Alignment (APA) technique, which turns on all phases
together under transient events with large step current. With
both APP and APA control, the ISL6312A can achieve
excellent transient performance and reduce the demand on
the output capacitors.
Channel-Current Balance
One important benefit of multiphase operation is the thermal
advantage gained by distributing the dissipated heat over
multiple devices and greater area. By doing this the designer
avoids the complexity of driving parallel MOSFETs and the
expense of using expensive heat sinks and exotic magnetic
materials.
In order to realize the thermal advantage, it is important that
each channel in a multiphase converter be controlled to
carry equal amounts of current at any load level. To achieve
this, the currents through each channel must be sampled
every switching cycle. The sampled currents, I_n, from each
active channel are summed together and divided by the
number of active channels. The resulting cycle average
current, I_AVG, provides a measure of the total load-current
demand on the converter during each switching cycle.
Channel-current balance is achieved by comparing the
sampled current of each channel to the cycle average
current, and making the proper adjustment to each channel
pulse width based on the error. Intersil’s patented current
12
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FN9290.6
January 22, 2015