ISL23445 Datasheet, PDF (1/20 Pages) Intersil Corporation – Quad, 256 Tap, Low Voltage Digitally Controlled Potentiometer (XDCP™)

Quad, 256 Tap, Low Voltage Digitally Controlled
Potentiometer (XDCP™)
ISL23445
The ISL23445 is a volatile, low voltage, low noise, low power, 256
tap, quad digitally controlled potentiometer (DCP) with an SPI
Bus^™ interface. It integrates four DCP cores, wiper switches
and control logic on a monolithic CMOS integrated circuit.
Each digitally controlled potentiometer is implemented with a
combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
SPI bus interface. Each potentiometer has an associated
volatile Wiper Register (WRi, i = 0, 1, 2, 3) that can be directly
written to and read by the user. The contents of the WRi
controls the position of the wiper. When powered on, the wiper
of each DCP will always commence at mid-scale (128 tap
position).
The low voltage, low power consumption, and small package
of the ISL23445 make it an ideal choice for use in battery
operated equipment. In addition, the ISL23445 has a V_LOGIC
pin allowing down to 1.2V bus operation, independent from the
V_CC value. This allows for low logic levels to be connected
directly to the ISL23445 without passing through a voltage
level shifter.
The DCP can be used as a three-terminal potentiometer or as a
two-terminal variable resistor in a wide variety of applications
including control, parameter adjustments, and signal processing.
Applications
• Power supply margining
• Trimming sensor circuits
• Gain adjustment in battery powered instruments
• RF power amplifier bias compensation
Features
• Four potentiometers per package
• 256 resistor taps
• 10kΩ, 50kΩ or 100kΩ total resistance
• SPI serial interface
- No additional level translator for low bus supply
- Daisy Chaining of multiple DCPs
• Maximum supply current without serial bus activity
(standby)
- 5µA @ V_CC and V_LOGIC = 5V
- 2uA @ V_CC and V_LOGIC = 1.7V
• Shutdown Mode
- Forces the DCP into an end-to-end open circuit and RWi is
connected to RLi internally
- Reduces power consumption by disconnecting the DCP
resistor from the circuit
• Power supply
- V_CC = 1.7V to 5.5V analog power supply
- V_LOGIC = 1.2V to 5.5V SPI bus/logic power supply
• Wiper resistance: 70Ω typical @ V_CC = 3.3V
• Power-on preset to mid-scale (128 tap position)
• Extended industrial temperature range: -40°C to +125°C
• 20 Ld TSSOP or 20 Ld QFN packages
• Pb-free (RoHS compliant)
10000
8000
6000
4000
2000
0
0
64
128
192
256
TAP POSITION (DECIMAL)
FIGURE 1. FORWARD AND BACKWARD RESISTANCE vs TAP
POSITION, 10kΩ DCP
VREF
RH1
1 DCP
of
ISL23445
RW1
RL1
-
+
ISL28114
VREF_M
FIGURE 2. V_REF ADJUSTMENT
June 21, 2011
1
FN7874.0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Intersil (and design) and XDCP are trademarks owned by Intersil Corporation or one of its subsidiaries.
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