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80C196MH Datasheet, PDF (24/41 Pages) Intel Corporation – 8XC196MH INDUSTRIAL MOTOR CONTROL CHMOS MICROCONTROLLER
8XC196MH INDUSTRIAL MOTOR CONTROL CHMOS MICROCONTROLLER
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Table 11. AC Timing Definitions (1) (Continued)
Symbol
Parameter
Min
Max
Units Notes
The External Memory System Must Meet These Specifications (Continued)
TLLGX
BUSWIDTH Hold after ALE/ADV# Low
TOSC
ns
TLHDV
ALE/ADV# High to Input Data Valid
3TOSC – 55
ns
TAVDV
Address Valid to Input Data Valid
3TOSC – 55
ns
3
TRLDV
RD# Active to Input Data Valid
TOSC – 30
ns
3
TRHDZ
End of RD# to Input Data Float
TOSC
ns
TRXDX
Data Hold after RD# Inactive
0
ns
The 8XC196MH will Meet These Specifications
TXHLH
XTAL1 Rising Edge to ALE Rising
20
110
ns
TXHLL
XTAL1 Rising Edge to ALE Falling
20
110
ns
TLHLH
ALE/ADV# Cycle Time
4TOSC
ns
3
TLHLL
ALE/ADV# High Period
TOSC – 10
TOSC + 10
ns
TAVLH
Address Valid to ALE/ADV# High
TOSC – 17
ns
TAVLL
Address Valid to ALE/ADV# Low
TOSC – 17
ns
TLLAX
Address Hold after ALE/ADV# Low
TOSC – 40
ns
TLLRL
ALE/ADV# Low to RD# Low
TOSC – 30
ns
TRLRH
RD# Low Period
TOSC – 5
TOSC + 25
ns
3
TRHLH
RD# High to ALE/ADV# High
TOSC
TOSC + 25
ns
5
TRLAZ
RD# Low to Address Float
5
ns
TLLWL
ALE/ADV# Low to WR# Low
TOSC – 10
ns
TQVWH
Data Valid before WR# High
TOSC – 23
ns
TWLWH
WR# Low Period
TOSC – 30
ns
3
TWHQX
Data Hold after WR# High
TOSC – 25
ns
TWHLH
WR# High to ALE/ADV# High
TOSC – 10
TOSC + 15
ns
5
TWHBX
BHE#, INST Hold after WR# High
TOSC – 10
ns
TWHAX
A15:8 Hold after WR# High
TOSC – 30
ns
6
TRHBX
BHE#, INST Hold after RD# High
TOSC – 10
ns
TRHAX
A15:8 Hold after RD# High
TOSC – 30
ns
6
NOTES:
1. Test Conditions: Capacitive load on all pins = 100 pF, rise and fall times = 10 ns, FOSC = 16 MHz.
2. Exceeding the maximum specification causes additional wait states.
3. If wait states are used, add 2TOSC × n, where n = number of wait states.
4. Testing is performed down to 8 MHz, although the device is static by design and will typically operate
below 1 Hz.
5. Assuming back-to-back bus cycles.
6. 8-bit bus only.
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