82546EB Datasheet, PDF (22/47 Pages) Intel Corporation – Dual Port Gigabit Ethernet Controller

82546EB — Networking Silicon
3.9
3.9.1
3.9.2
3.9.3
Symbol Type
Name and Function
JTAG_
TRST#
I
CLK_VIEW O
TEST*
I
JTAG Reset. This is an active low reset signal for JTAG. This signal should be
terminated using a pull-down resistor to ground. It must not be left unconnected.
Clock View. The Clock View signal is an output of clock signals required for IEEE
testing.
Factory Test Pin.
Power Supply Connections
Power Support Signals
Symbol Type
Name and Function
CTRL_15 O
1.5 V Control. The 1.5 V Control signal is an output to an external power transistor. If
regulators are used, it should be left unconnected.
CTRL_25A O
CTRL_25B O
2.5 V Control. The 2.5 V Control signal is an output to an external power transistor. If
regulators are used, it should be left unconnected.
2.5 V Control. The 2.5 V Control signal is an output to an external power transistor. If
regulators are used, it should be left unconnected.
Digital Supplies
Symbol
VDDO
DVDD
Type
Name and Function
P
3.3 V I/O Power Supply.
P
1.5 V Digital Core Power Supply.
Analog Supplies
Symbol
AVDDH
AVDDLA
AVDDLB
Type
Name and Function
P
3.3 V Analog Power Supply.
P
2.5 V Analog Power Supply to Port A.
P
2.5 V Analog Power Supply to Port B.
16
Datasheet