82C55A Datasheet, PDF (19/23 Pages) Intel Corporation – CHMOS PROGRAMMABLE PERIPHERAL INTERFACE

82C55A
CAPACITANCE
T_A ^e 25 C V_CC ^eGND ^e 0V
Symbol
Parameter
Min
C_IN
C_{I O}
Input Capacitance
I O Capacitance
NOTE
5 Sampled not 100% tested
A C CHARACTERISTICS
T_A ^e 0 to 70 C V_CC ^{e a}5V g10% GND ^e 0V
T_A ^{e b}40 C to ^a85 C for Extended Temperature
BUS PARAMETERS
READ CYCLE
Symbol
Parameter
t_AR
v Address Stable Before RD
t_RA
u Address Hold Time After RD
t_RR
RD Pulse Width
t_RD
v Data Delay from RD
t_DF
u RD to Data Floating
t_RV
Recovery Time between RD WR
Max
10
20
Units
pF
pF
Test Conditions
Unmeasured plns
returned to GND
f_c ^e 1 MHz⁽⁵⁾
82C55A-2
Min
Max
0
0
150
120
10
75
200
Units
ns
ns
ns
ns
ns
ns
Test
Conditions
WRITE CYCLE
Symbol
Parameter
t_AW
v Address Stable Before WR
t_WA
u Address Hold Time After WR
t_WW
WR Pulse Width
t_DW
u Data Setup Time Before WR
t_WD
u Data Hold Time After WR
82C55A-2
Min
Max
0
20
20
100
100
30
30
Units
ns
ns
ns
ns
ns
ns
ns
Test
Conditions
Ports A B
Port C
Ports A B
Port C
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