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IA64250 Datasheet, PDF (5/21 Pages) InnovASIC, Inc – Histogram/Hough Transform Processor
IA64250
Histogram/Hough Transform Processor
Data Sheet
As of Production Ver. 01
I/O SIGNAL DESCRIPTION:
The diagram below describes the I/O characteristics for each signal on the IC. The signal
names correspond to the signal names on the pinout diagrams provide.
I/O Characteristics:
IODV
VDO.0 - VDO.8
CIO.0 - CIO.8
WE
REGADR.0 - REGADR.5
AT
CLK1
CLK2
STARTIO
CX,CY
RX,RY
RESET FP
PO
O WhenHIGH,ACCRAMorLUTRAMdataontheDObusisvalid.
O LUT RAM data output (uses CLK1).
I Control register and LUT input data bus.
I Used to strobe data into mode latches when LOW.
I Selects mode latch, marker or maximum registers.
Selects marker and maximum registers when HIGH or mode latches when LOW.
I AT must be LOW to access the LUT or ACC RAMs via the DO bus.
I Pixel clock active at rising edge.
I User I/O clock (may be connected to CLK1)
I Initiates RAM I/O at HIGH to LOW transition.
I Used to increment X or Y counters when HIGH.
I Resets X or Y counters(overrides CX, CY) when HIGH.
I Resets FP counter when HIGH.
O Test pin should be left unconnected.
Copyright © 2000
innovASIC

The End of Obsolescence™
ENG211001219-01
Page 5 of 21
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