IA64250 Datasheet, PDF (14/21 Pages) InnovASIC, Inc – Histogram/Hough Transform Processor

IA64250
Histogram/Hough Transform Processor
Data Sheet
As of Production Ver. 01
data is valid. After the desired number of memory elements have been read, the user returns
STARTIOn high. The I/O mode completes three cycles later and IODV returns low to
indicate the end of the I/O operation. As soon as IODV returns low, the processor returns
to the pixel processing mode specified by the mode register.
The long cycle is terminated without user intervention after all elements of the ACC or LUT
RAMs have been accessed. Again, valid data appears on the DO pins three CLK2 cycles
after STARTIOn goes low. In this case, IODV is high for 512 CLK2 cycles and goes low
after the last RAM element has been read. After IODV returns low, STARTIOn can remain
low or be raised high at any time without affecting the operation of the IA64250.
READING ACC/LUT
RAM OR TRANSFERING
ACC TO LUT:
Short I/O Cycle:
CLK2
STARTIO
D0
IODV
XXXX XXXX XXXX RAM0
RAM1
RAM2
XXXX
CLK2
STARTIO
DO
IODV
End of Long I/O Cycle:
RAM508 RAM509 RAM510 RAM511 XXXX XXXX XXXX
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The End of Obsolescence™
ENG211001219-01
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