IA6805E2 Datasheet, PDF (4/31 Pages) InnovASIC, Inc – Microprocessor Unit

IA6805E2
Microprocessor Unit
Data Sheet
As of Production Version 00
I/O Pin Functions
R/W-n DDR
I/O Pin Functions
0
0 _{The I/O pin is in input mode. Data is}
written into the output data latch.
0
1 _{Data is written into the output data latch and}
output to the I/O pin.
1
0 The state of the I/O pin is read.
1
1 _{the I/O pin is in an output mode. The}
output data latch is read.
I/O Port Circuitry and Register Configuration:
DATA DIRECTION
REGISTER
BIT
TO
AND
LATCHED
OUTPUT
FROM
DATA BIT
CPU
INPUT
REG
BIT
OUTPUT
I/O
PIN
INPUT
I/O
PIN
76 5 43 21 0
DATA DIRECTION
A(B)
DDA7
DDA6 DDA5
DDA4
DDA3 DDA2
DDA1
DDA0
$0004 ($0005)
REGISTER ^{(DDB7) (DDB6) (DDB5) (DDB4) (DDB3) (DDB2) (DDB1) (DDB0)}
PORT A(B)
REGISTER
$0000 ($0001)
PIN ^{PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0}
(PB7) (PB6) (PB5) (PB4) (PB3) (PB2) (PB1) (PB0)
Figure 2. PA0-PA7/PB0-PB7 (Input/Output Lines)
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innovASIC
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ENG21108140100
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