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XC167CS-32F Datasheet, PDF (84/90 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core
XC167-32
Derivatives
Electrical Parameters
CLKOUT
RD, WR
D15-D0
(read)
D15-D0
(write)
READY
Synchronous
READY
Asynchron.
tpD
tp E
tpRDY
tpF
tc10
tc20
tc31
tc30
Data In
tc25
Data Out
tc31
tc31
tc30
tc30
Not Rdy READY
tc31
tc30
tc31
tc30
Not Rdy READY
MCT05559
Figure 23 READY Timing
Note: If the READY input is sampled inactive at the indicated sampling point (“Not Rdy”)
a READY-controlled waitstate is inserted (tpRDY),
sampling the READY input active at the indicated sampling point (“Ready”)
terminates the currently running bus cycle.
Note the different sampling points for synchronous and asynchronous READY.
This example uses one mandatory waitstate (see tpE) before the READY input is
evaluated.
Data Sheet
82
V1.0, 2005-06