XC167CS-32F Datasheet, PDF (12/90 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core

XC167-32
Derivatives
General Device Information
Table 2
Pin Definitions and Functions
Sym- Pin Input Function
bol
Num. Outp.
P20.12 3
IO
For details, please refer to the description of P20.
NMI 4
I
Non-Maskable Interrupt Input. A high to low transition at this
pin causes the CPU to vector to the NMI trap routine. When
the PWRDN (power down) instruction is executed, the NMI
pin must be low in order to force the XC167 into power down
mode. If NMI is high, when PWRDN is executed, the part will
continue to run in normal mode.
If not used, pin NMI should be pulled high externally.
P6
IO
Port 6 is an 8-bit bidirectional I/O port. Each pin can be
programmed for input (output driver in high-impedance
state) or output (configurable as push/pull or open drain
driver). The input threshold of Port 6 is selectable (standard
or special).
The Port 6 pins also serve for alternate functions:
P6.0 7
O
CS0
Chip Select 0 Output,
IO
CC0IO CAPCOM1: CC0 Capture Inp./Compare Output
P6.1 8
O
CS1
Chip Select 1 Output,
IO
CC1IO CAPCOM1: CC1 Capture Inp./Compare Output
P6.2 9
O
CS2
Chip Select 2 Output,
IO
CC2IO CAPCOM1: CC2 Capture Inp./Compare Output
P6.3 10
O
CS3
Chip Select 3 Output,
IO
CC3IO CAPCOM1: CC3 Capture Inp./Compare Output
P6.4 11
O
CS4
Chip Select 4 Output,
IO
CC4IO CAPCOM1: CC4 Capture Inp./Compare Output
P6.5 12
I
HOLD
External Master Hold Request Input,
IO
CC5IO CAPCOM1: CC5 Capture Inp./Compare Output
P6.6 13
I/O HLDA
Hold Acknowledge Output (master mode) or
Input (slave mode),
IO
CC6IO CAPCOM1: CC6 Capture Inp./Compare Output
P6.7 14
O
BREQ Bus Request Output,
IO
CC7IO CAPCOM1: CC7 Capture Inp./Compare Output
Data Sheet
10
V1.0, 2005-06