TLE6251-2G Datasheet, PDF (8/35 Pages) Infineon Technologies AG – High Speed CAN-Transceiver with Wake and Failure Detection

TLE6251-2G
Functional Description
The TLE6251-2G is a High Speed CAN transceiver, operating as an interface between the CAN controller and the
physical bus medium. A High Speed CAN network (abbreviated HS CAN) is a two wire differential network which
allows data transmission rates up to 1 MBaud. Characteristic for a HS CAN network are the two CAN bus states
“Dominant” and “Recessive” (see Figure 3).
A HS CAN network is a Carrier Sense Multiple Access network with Collision Detection. This means, every
participant of the CAN network is allowed to place its message on the same bus media simultaneously. This can
cause data collisions on the bus, which might corrupt the information content of the data stream. In order avoid
the loss of any information and to prioritize the messages, it is essential that the “Dominant” bus signal overrules
the “Recessive” bus signal.
The input TxD and the output RxD are connected to the microcontroller of the ECU. As shown in Figure 1, the
HS CAN transceiver TLE6251-2G has a receive unit and a output driver stage, allowing the transceiver to send
data to the bus medium and monitor the data from the bus medium at the same time. The HS CAN transceiver
TLE6251-2G converts the serial data stream available on the transmit data input TxD into a differential output
signal on CAN bus. The differential output signal is provided by the pins CANH and CANL. The receiver stage of
the TLE6251-2G monitors the data on the CAN bus and converts them to a serial data stream on the RxD pin. A
logical “Low” signal on the TxD pin creates a “Dominant” signal on the CAN bus, followed by a logical “Low” signal
on the RxD pin (see Figure 3). The feature, broadcasting data to the CAN bus and listening to the data traffic on
the CAN bus simultaneous is essential to support the bit to bit arbitration on CAN networks.
The voltage levels for a HS CAN on the bus medium are defined by the ISO 11898-2/-5 standards. If a data bit is
“Dominant” or “Recessive”, this depends on the voltage difference between CANH and CANL: V_DIFF = V_CANH -
V_CANL. To transmit a “Dominant” signal to the CAN bus the differential signal V_DIFF is larger or equal to 1.5 V. To
receive a “Recessive” signal from the CAN bus the differential signal V_DIFF is smaller or equal to 0.5 V.
The voltage level on the digital input TxD and the digital output RxD is determined by the power supply level at the
pin V_IO. Depending on voltage level at the V_IO pin, the signal levels on the logic pins (EN, NERR, NSTB, TxD and
RxD) are compatible to microcontrollers with 5 V or 3.3 V I/O supply. Usually the V_IO power supply of the
transceiver is connected to same power supply as I/O power supply of the microcontroller.
Partially supplied CAN networks are networks where the participants have a different power supply status. Some
nodes are powered up, other nodes are not powered, or some other nodes are in a Low - Power Mode, like Sleep
Mode for example. Regardless on the supply status of the HS CAN node, each participant which is connected to
the common bus, shall not disturb the communication on the bus media. The TLE6251-2G is designed to support
partially supplied networks. In power down status, the resistors of the Normal Receiver are switched off and the
bus input on the pins CANH and CANL is high resistive.
Data Sheet
8
Rev. 1.0, 2009-05-07