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TDA5252G2 Datasheet, PDF (78/86 Pages) Infineon Technologies AG – ASK/FSK 915MHz Wireless Transceiver
TDA5252 G2
Version 1.1
Reference
Table 4-5 Digital Characteristics with TA = 25 °C, VVdd = 2.1 ... 5.5 V
#
Parameter
Symbol Limit Values Unit Test Conditions
min typ max
14 LOW period of BusCLK clock tLOW 1.3
15 HIGH period of BusCLK tHIGH 0.6
clock
16 Setup time for a repeated tSU.STA 0.6
START condition
µs
Vdd=5V
µs
Vdd=5V
µs
only I2C mode
17
Data hold time
18
Data setup time
19 Rise, fall time of both
BusData and BusCLK
signals
tHD.DAT 0
tSU.DAT 100
tR, tF 20+
0.1Cb
20 Setup time for STOP
condition
tSU.STO 0.6
21 Capacitive load for each bus Cb
line
ns
ns
300 ns
Vdd=5V
Vdd=5V
Vdd=5V
µs
400 pF
only I2C mode
Vdd=5V
Vdd=5V
22 Setup time for BusCLK to EN tSU.SCLE 0.6
23 H-pulsewidth (EN)
N
tWHEN 0.6
µs only 3-wire mode
Vdd=5V
µs
Vdd=5V
L Item
X
X
X
X
X
X2
X
X
X
X
X: Not part of the production test - either verified by design or measured in an Infineon Evalboard as described in
Section 4-2.
1: limited by transmission channel bandwidth and depending on transmit power level; ETSI regulation EN 300 220
fullfilled.
2: Cb= capacitance of one bus line
Data Sheet
78
2007-02-26