1EDI10I12MH Datasheet, PDF (7/18 Pages) Infineon Technologies AG – Single channel IGBT gate driver IC with clamp in wide body package

EiceDRIVER^™ 1EDI Compact
Single channel IGBT gate driver IC with clamp in wide body package
Functional Description
3.3
Protection Features
3.3.1
Undervoltage Lockout (UVLO)
IN+
VCC1
VUVLOH2
VUVLOL2
VCC2
VUVLOH1
VUVLOL1
Figure 4
OUT
UVLO Behavior
To ensure correct switching of IGBTs the device is equipped with an undervoltage lockout for input and output
independently. Operation starts only after both VCC levels have increased beyond the respective V_UVLOH levels
If the power supply voltage V_VCC1 of the input chip drops below V_UVLOL1 a turn-off signal is sent to the output
chip before power-down. The IGBT is switched off and the signals at IN+ and IN- are ignored until V_VCC1 reaches
the power-up voltage V_UVLOH1 again.
If the power supply voltage V_VCC2 of the output chip goes down below V_UVLOL2 the IGBT is switched off and
signals from the input chip are ignored until V_VCC2 reaches the power-up voltage V_UVLOH2 again.
3.3.2
Active Shut-Down
The active shut-down feature ensures a safe IGBT off-state if the output chip is not connected to the power
supply or an undervoltage lockout is in effect. The IGBT gate is clamped at OUT to GND2.
3.3.3
Short Circuit Clamping
During short circuit the IGBT’s gate voltage tends to rise because of the feedback via the Miller capacitance. An
additional protection circuit connected to OUT and CLAMP limits this voltage to a value slightly higher than the
supply voltage. A maximum current of 500 mA may be fed back to the supply through one of these paths for
10 μs. If higher currents are expected or tighter clamping is desired external Schottky diodes may be added.
3.3.4
Active Miller Clamp
In a half bridge configuration the switched off IGBT tends to dynamically turn on during turn on phase of the
opposite IGBT. A Miller clamp allows sinking the Miller current across a low impedance path in this high dV/dt
situation. Therefore in many applications, the use of a negative supply voltage can be avoided. During turn-off,
the gate voltage is monitored and the clamp output is activated when the gate voltage drops below typical 2 V
(referred to GND2). The clamp is designed for a Miller current in the same range as the nominal output current.
Datasheet
7
Rev. 2.0
2016-07-05