XC167CI-16F_06 Datasheet, PDF (62/90 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core

XC167CI-16F
Derivatives
Electrical Parameters
Table 11 DC Characteristics (Operating Conditions apply)¹⁾ (cont’d)
Parameter
Symbol
Limit Values
Unit Test Condition
Configuration pull-
down current¹³⁾
Level inactive hold
current¹⁴⁾
Level active hold
current¹⁴⁾
I 11)
CPDL
I 12)
CPDH
I_LHI11)
I_LHA12)
Min.
–
120
–
-100
Max.
10
–
-10
–
µA V_IN = V_ILmax
µA V_IN = V_IHmin
µA V_OUT = 0.5 ×
V_DDP
µA V_OUT = 0.45 V
XTAL1, XTAL3 input I_IL
current
Pin capacitance¹⁵⁾
C_IO
(digital inputs/outputs)
CC –
CC –
±20
µA 0 V < V_IN < V_DDI
10
pF –
1) Keeping signal levels within the limits specified in this table, ensures operation without overload conditions.
For signal levels outside these specifications, also refer to the specification of the overload current I_OV.
2) If XTAL1 is driven by a crystal, reaching an amplitude (peak to peak) of 0.4 × V_DDI is sufficient.
3) If XTAL3 is driven by a crystal, reaching an amplitude (peak to peak) of 0.25 × V_DDI is sufficient.
4) This parameter is tested for P2, P3, P4, P6, P7, P9.
5) The maximum deliverable output current of a port driver depends on the selected output driver mode, see
Table 12, Current Limits for Port Output Drivers. The limit for pin groups must be respected.
6) As a rule, with decreasing output current the output levels approach the respective supply level (V_OL → V_SS,
V_OH → V_DDP). However, only the levels for nominal output currents are guaranteed.
7) This specification is not valid for outputs which are switched to open drain mode. In this case the respective
output will float and the voltage results from the external circuitry.
8) An additional error current (I_INJ) will flow if an overload current flows through an adjacent pin. Please refer to
the definition of the overload coupling factor K_OV.
9) The driver of P3.15 is designed for faster switching, because this pin can deliver the reference clock for the
bus interface (CLKOUT). The maximum leakage current for P3.15 is, therefore, increased to 1 µA.
10) This specification is valid during Reset for configuration on RD, WR, EA, PORT0.
The pull-ups on RD and WR (WRL/WRH) are also active during bus hold.
11) The maximum current may be drawn while the respective signal line remains inactive.
12) The minimum current must be drawn to drive the respective signal line active.
13) This specification is valid during Reset for configuration on ALE.
The pull-down on ALE is also active during bus hold.
14) This specification is valid during Reset for pins P6.4-0, which can act as CS outputs.
The pull-ups on CS outputs are also active during bus hold.
The pull-up on pin HLDA is active when arbitration is enabled and the EBC operates in slave mode.
15) Not subject to production test - verified by design/characterization.
Data Sheet
60
V1.3, 2006-08