XC167CI-16F_06 Datasheet, PDF (16/90 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core

XC167CI-16F
Derivatives
General Device Information
Table 2
Pin Definitions and Functions (cont’d)
Sym- Pin Input Function
bol
Num. Outp.
P3
IO
Port 3 is a 15-bit bidirectional I/O port. Each pin can be
programmed for input (output driver in high-impedance
state) or output (configurable as push/pull or open drain
driver). The input threshold of Port 3 is selectable (standard
or special).
The following Port 3 pins also serve for alternate functions:
P3.0 59
I
T0IN
CAPCOM1 Timer T0 Count Input,
O
TxD1
ASC1 Clock/Data Output (Async./Sync),
I
EX1IN Fast External Interrupt 1 Input (alternate pin B)
P3.1 60
O
T6OUT GPT2 Timer T6 Toggle Latch Output,
I/O RxD1
ASC1 Data Input (Async.) or Inp./Outp. (Sync.),
I
EX1IN Fast External Interrupt 1 Input (alternate pin A)
P3.2 61
I
CAPIN GPT2 Register CAPREL Capture Input
P3.3 62
O
T3OUT GPT1 Timer T3 Toggle Latch Output
P3.4 63
I
T3EUD GPT1 Timer T3 External Up/Down Control Input
P3.5 64
I
T4IN
GPT1 Timer T4 Count/Gate/Reload/Capture Inp
P3.6 65
I
T3IN
GPT1 Timer T3 Count/Gate Input
P3.7 66
I
T2IN
GPT1 Timer T2 Count/Gate/Reload/Capture Inp
P3.8 67
I/O
MRST0 SSC0 Master-Receive/Slave-Transmit In/Out.
P3.9 68
I/O
MTSR0 SSC0 Master-Transmit/Slave-Receive Out/In.
P3.10 69
O
TxD0
ASC0 Clock/Data Output (Async./Sync.),
I
EX2IN Fast External Interrupt 2 Input (alternate pin B)
P3.11 70
I/O
RxD0
ASC0 Data Input (Async.) or Inp./Outp. (Sync.),
I
EX2IN Fast External Interrupt 2 Input (alternate pin A)
P3.12 75
O
BHE
External Memory High Byte Enable Signal,
O
WRH
External Memory High Byte Write Strobe,
I
EX3IN Fast External Interrupt 3 Input (alternate pin B)
P3.13 76
I/O
SCLK0 SSC0 Master Clock Output/Slave Clock Input.,
I
EX3IN Fast External Interrupt 3 Input (alternate pin A)
P3.15 77
O
CLKOUT Master Clock Output,
O
FOUT
Programmable Frequency Output
TCK 71
I
Debug System: JTAG Clock Input
TDI
72
I
Debug System: JTAG Data In
TDO 73
O
Debug System: JTAG Data Out
TMS 74
I
Debug System: JTAG Test Mode Selection
Data Sheet
14
V1.3, 2006-08