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TDA5251F1 Datasheet, PDF (29/88 Pages) Infineon Technologies AG – ASK/FSK 315MHz Wireless Transceiver
Confidential
TDA5251 F1
Version 1.0
Functional Description
Table 2-22
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Sub Address 08H: RSSI_TH3
Function
Description
not used
SELECT
0= VCC, 1= RSSI
TH3_5
TH3_4
TH3_3
TH3_2
TH3_1
TH3_0
Default
1
1
1
1
1
1
1
1
Table 2-23
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Table 2-24
Sub Address 0EH: XTAL_CONFIG
Bit
Function
Description
D7
not used
D6
not used
D5
not used
D4
not used
D3
not used
D2
FSK-Ramp 0
only in bipolar mode
D1
FSK-Ramp 1
D0
Bipolar_FET
0= FET, 1=Bipolar
Sub Address 0DH: CLK_DIV
Function
not used
not used
DIVMODE_1
DIVMODE_0
CLKDIV_3
CLKDIV_2
CLKDIV_1
CLKDIV_0
Default
0
0
0
0
0
0
0
1
Table 2-25
Sub Address 0FH: BLOCK_PD
Bit
Function
Description
D15
REF_PD
1= power down Band Gap Reference
D14
RC_PD
1= power down RC Oscillator
D13
WINDOW_PD
1= power down Window Counter
D12
ADC_PD
1= power down ADC
D11
PEAK_DET_PD
1= power down Peak Detectors
D10
DATA_SLIC_PD
1= power down Data Slicer
D9
DATA_FIL_PD
1= power down Data Filter
D8
QUAD_PD
1= power down Quadri Correlator
D7
LIM_PD
1= power down Limiter
D6
I/Q_FIL_PD
1= power down I/Q Filters
D5
MIX2_PD
1= power down I/Q Mixer
D4
MIX1_PD
1= power down 1st Mixer
D3
LNA_PD
1= power down LNA
D2
PA_PD
1= power down Power Amplifier
D1
PLL_PD
1= power down PLL
D0
XTAL_PD
1= power down XTAL Oscillator
Default
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Default
0
0
0
0
1
0
0
0
Table 2-26
Sub Address 80H: STATUS
Bit
Function
Description
D7
COMP_LOW
1 if data rate < TH1
D6
COMP_IN
1 if TH1 < data rate < TH2
D5
COMP_HIGH
1 if TH2 < data rate
D4 COMP_0,5*LOW
1 if data rate < 0,5*TH1
D3
COMP_0,5*IN
1 if 0,5*TH1 < data rate < 0,5*TH2
D2 COMP_0,5*HIGH
1 if 0,5*TH2 < data rate
D1
RSSI=TH3
1 if RSSI value is equal TH3
D0
RSSI>TH3
1 if RSSI value is greater than TH3
Table 2-27
Bit
Function
D7
PD_ADC
D6
SELECT
D5
RSSI_5
D4
RSSI_4
D3
RSSI_3
D2
RSSI_2
D1
RSSI_1
D0
RSSI_0
Sub Address 81H: ADC
Description
ADC power down feedback Bit
SELECT feedback Bit
RSSI value Bit5
RSSI value Bit4
RSSI value Bit3
RSSI value Bit2
RSSI value Bit1
RSSI value Bit0
Preliminary Specification
29
2003-02-18