TLE6240GP_10 Datasheet, PDF (28/37 Pages) Infineon Technologies AG – Smart 16-Channel Low-Side Switch

TLE6240GP
Smart 16-Channel Low-Side Switch
Control of the Device
The AND operation implies that the output can be switched off by the SPI data bit input, even if the corresponding
parallel input is in the ON state.
SPI Priority for OFF-State
This also implies that the serial input data bit can only switch the output channel ON if the corresponding parallel
input is in the ON state.
If the AND operation is programmed it is latched until it is overwritten by the OR operation.
6.1.5.6 Example for an access to channel 1 to 8
LLHH LLLL HLLH LLLH: OR operation between parallel inputs and data bits, i.e channel 1, 5 and 8 will be switched
on.
The next command is now: LHHH LLLL HHHH LLLL
LHHH LLLL as command word has no special meaning and will not be accepted. The output states will not be
changed and the shift register will be reset (at the next CS SO Data all ‘0’).
6.2
Diagnostics
For full diagnosis there are two diagnostic bits per channel configured as shown in Figure 21.
Diagnostic Serial Data OUT SO
15 14 13 12 11 10 9 8 7 6- - - - -
Ch.8 Ch.7 Ch.6 Ch.5
Ch.16 Ch.15 Ch.14 Ch.13
HH
Normal function
HL
Overload, Shorted Load or Overtemperature
LH
Open Load
LL
Shorted to Ground
Figure 21 Two Bits per Channel Diagnostic Feedback
• Normal function: The bit combination HH indicates that there is no fault condition, i.e. normal function.
• Overload, Short Circuit to Battery (SCB) or Overtemperature: HL is set when the current limitation gets
active, i.e. there is a overload, short to supply or overtemperature condition.
• Open load: An open load condition is detected when the drain voltage decreases below 3 V (typ.). LH bit
combination is set.
• Short Circuit to GND: If a drain to ground short circuit exists and the drain to ground current exceeds 100 µA,
short to ground is detected and the LL bit combination is set.
A definite distinction between open load and short to ground is specified by design.
The standard way of obtaining diagnostic information is as follows:
Clock in serial information into SI pin and wait approximately 150 µs to allow the outputs to settle. Clock in the
identical serial information once again - during this process the data coming out at SO contains the bit
combinations representing the diagnosis conditions as described in Figure 21.
Reset of the Diagnosis Register
The diagnosis register is reset after reading the diagnosis data (after the falling CS edge). This is done for
channels 1-8 and channels 9-16 separately depending on the previous command.
Data Sheet
28
Rev.3.3, 2010-02-15