TLE6240GP_10 Datasheet, PDF (23/37 Pages) Infineon Technologies AG – Smart 16-Channel Low-Side Switch

TLE6240GP
Smart 16-Channel Low-Side Switch
Control of the Device
6.1.4 Control- and Data Byte
As mentioned above, the serial input information consist of a control byte and a data byte. Via the control byte, the
specific mode of the device is programmable.
Table 1 Control and Data Byte
MSB
LSB
C
C
C
C
C
C
C
C
D
D
D
D
D
D
D
D
Control Byte
Data Byte
Ten specific control words are recognized, having the following functions:
Table 2 Commands
No. Control Byte Data Byte
Function
Channel 1 to 8
1
LLLL LLLL¹⁾ XXXX XXXX²⁾ ‘Full Diagnosis’ (two bits per channel) performed for channels 1 to 8. No
change to output states.
2 HHLL LLLL XXXX XXXX State of the eight parallel inputs and ‘1-bit Diagnosis’ for channel 1 to 8 is
provided.
3 HLHL LLLL XXXX XXXX Echo-function of SPI; SI direct connected to SO.
4
LLHH LLLL DDDDDDDD²⁾ IN1 … 4 and serial data bits ‘OR’ed. ‘Full Diagnosis’ performed for
channels 1 to 8.
5 HHHH LLLL DDDDDDDD IN1 … 4 and serial data bits ‘AND’ed. ‘Full Diagnosis’ performed for
channels 1 to 8.
Channel 9 to 16
6
LLLL HHHH¹⁾ XXXX XXXX ‘Full Diagnosis’ (two bits per channel) performed for channels 9 to 16. No
change to output states.
7 HHLL HHHH XXXX XXXX State of the eight parallel inputs and ‘1-bit Diagnosis’ for channel 9 to 16 is
provided.
8 HLHL HHHH XXXX XXXX Echo-function of SPI; SI direct connected to SO.
9 LLHH HHHH DDDDDDDD IN9 … 12 and serial data bits ‘OR’ed. ‘Full Diagnosis’ performed for
channels 9 to 16.
10 HHHH HHHH DDDDDDDD IN9 … 12 and serial data bits ‘AND’ed. ‘Full Diagnosis’ performed for
channels 9 to 16.
1) Control Byte: Channel Selection via Bit 0 to 3
Bits 0 to 3 = L, Channels 1 to 8 selected
Bits 0 to 3 = H, Channels 9 to 16 selected
2) Data Byte: ‘X’ means ‘don’t care’, because this data bits will be ignored.
‘D’ represents the data bits, either being H (= ON) or L (= OFF).
Control words beside No. 1- 10
Not specified Control words are not executed (cause no function) and the shift register (SO Data) is reset after the
CS signal (all ‘0’).
Data Sheet
23
Rev.3.3, 2010-02-15