PEB20534 Datasheet, PDF (273/439 Pages) Siemens Semiconductor Group – DMA Supported Serial Communication Controller with 4 Channels DSCC4

PEB 20534
PEF 20534
Detailed Register Description
Table 64 SCC Register Overview
Register Access Register
Offset Type
Valid in
Mode(s)
00_H
w
CMDR Command Register
H/A/B
04_H
r
STAR
Status Register
H/A/B
08_H
r/w
CCR0
Channel Configuration Register 0
H/A/B
0C_H
r/w
CCR1
Channel Configuration Register 1
H/A/B
10_H
r/w
CCR2
Channel Configuration Register 2
H/A/B
14_H
r/w
ACCM ASYNC Control Character Map
H (PPP)
18_H
r/w
UDAC
User Defined ASYNC Character
H (PPP)
1C_H
r/w
TTSA
Transmit Time Slot Assignment Register H/A/B
20_H
r/w
RTSA
Receive Time Slot Assignment Register H/A/B
24_H
r/w
PCMMTX PCM Mask for Transmit
H/A/B
28_H
r/w
PCMMRX PCM Mask for Receive
H/A/B
2C_H
r/w
BRR
Baud Rate Register
H/A/B
30_H
r/w
TIMR
Timer Register
H/A/B
34_H
r/w
XADR
Transmit Address Register
H
38_H
r/w
RADR
Receive Address Register
H
3C_H
r/w
RAMR Receive Address Mask Register
H
40_H
r/w
RLCR
Receive Length Check Register
H
44_H
r/w
XNXFR XON/XOFF Register
A
48_H
r/w
TCR
Termination Character Register
A/B
4C_H
r/w
TICR
Transmit Immediate Character Register A
50_H
r/w
SYNCR Synchronization Character Register
B
54_H
r/w
IMR
Interrupt Mask Register
H/A/B
58_H
r
ISR
Interrupt Status Register
H/A/B
Data Sheet
273
2000-05-30