PEB20534 Datasheet, PDF (120/439 Pages) Siemens Semiconductor Group – DMA Supported Serial Communication Controller with 4 Channels DSCC4

PEB 20534
PEF 20534
Multi Function Port (MFP)
Master
Shift Register
Clock
Device 1
MTSR
Transmit
MRST
Receive
CLK
Clock
Device 2
MTSR
MRST
CLK
Slave
Shift Register
Clock
Device 2
MTSR
MRST
CLK
Slave
Shift Register
Clock
MCS01963
Figure 36 SSC Full Duplex Configuration
Note: The shift direction applies to MSB-first operation as well as to LSB-first operation.
The data output pins MRST of all slave devices are connected together onto the one
receive line in this configuration. During a transfer each slave shifts out data from its shift
register. There are two ways to avoid collisions on the receive line due to different slave
data:
1. Only one slave drives the line, i.e. enables the driver of its MRST pin. All the other
slaves have to program their MRST pins to input. So only one slave can put its data
onto the master's receive line. Only receiving of data from the master is possible. The
master selects the slave device from which it expects data either by separate select
lines, or by sending a special command to this slave. The selected slave then switches
its MRST line to output, until it gets a deselection signal or command.
2. The slaves use open drain output on MRST. This forms a Wired-AND connection.
The receive line needs an external pullup in this case. Corruption of the data on the
receive line sent by the selected slave is avoided, when all slaves which are not
selected for transmission to the master only send ’ones’. Since this high level is not
actively driven onto the line, but only held through the pullup device, the selected slave
can pull this line actively to a low level when transmitting a zero bit. The master selects
the slave device, from which it expects data either by separate select lines, or by
sending a special command to this slave.
Data Sheet
120
2000-05-30