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TLE6210G Datasheet, PDF (26/35 Pages) Infineon Technologies AG – ABS System IC
TLE 6210
TLE 6211
Block Description and Electrical Characteristics
Any watchdog high or low time above 15 ms influences the enable (EN) and the VR
output.If the time after the last watchdog edge exceeds 120 clock cycles - typical
120 ms- an error flag is set. This flag can only be removed by powering down the IC.
1
WD1
0
1
WD2
0
10ms
1
EN
0
1
Counter reset
0
(15+3) * tCLK
1
set error flag
0
16 * tCLK
112 * tCLK + Delay = 112 * tCLK+ 3 * tCLK )
set-error-flag
AD 03/02
Figure 10 Missing watchdog signals for more than 120 * tCLK (typ. 120ms) sets
the failure register
An integrated pull-up resistor to UST in the WD1 and WD2 inputs ensures to detect a
permanent logic High in case the input is open.
V1.2 Data Sheet
26
2002-08