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TLE6210G Datasheet, PDF (19/35 Pages) Infineon Technologies AG – ABS System IC
TLE 6210
TLE 6211
Block Description and Electrical Characteristics
When the undervoltage condition at UST or UZP is no longer detected a reset reaction
time of typical 52 ms (52 clock cycles) is started. After this time the reset signal is set
high.
Table 1
Truth Table Overvoltage and Undervoltage Supervision
The table assumes that no other error is detected, especially no watchdog failure and no
clock failure.
Supply
voltage
UZP
ok
Regulator SILA NSILA MR VR EN RES 1 Regulator
Voltage
RES 2
UST
ok
= SIA = not SIA = not L
Z
H
ON
MRA
ok
under-
L
Z
Z
Z
L
L
ON
voltage
normal
over-
L
Z
voltage
Z
Z
L
H
ON
under-
under-
L
Z
voltage
voltage
Z
Z
Z* L
OFF
under-
ok
voltage
= SIA = not SIA not L
H
H
ON
MRA
over-
x
voltage
=L Z
Z
Z
Z* L
OFF
Z: high impedance
* In the application the voltage is undefined as regulator is off
V1.2 Data Sheet
19
2002-08