HYS64D128021 Datasheet, PDF (19/23 Pages) Infineon Technologies AG – 200-Pin Small Outline Dual-In-Line Memory Modules

HYS64D128021[H/G]BDL–[5/6]–B
Small Outline DDR SDRAM Modules
SPD Contents
4
SPD Contents
Table 11 SPD Codes for HYS64D128021[H/G]BDL–[5/6]–B
Byte#
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
1 GByte
×64
2 Ranks
Label Code
PC3200S–
3033–1
Jedec SPD Revision
Rev 1.0
Description
HEX
Programmed SPD Bytes in
80
E2PROM
Total number of Bytes in
08
E2PROM
Memory Type (DDR = 07h)
07
Number of Row Addresses
0D
Number of Column Addresses 0B
Number of DIMM Ranks
02
Data Width (LSB)
40
Data Width (MSB)
00
Interface Voltage Levels
04
tCK @ CLmax (Byte 18) [ns]
50
tAC SDRAM @ CLmax (Byte 18) 50
[ns]
Error Correction Support
00
Refresh Rate
82
Primary SDRAM Width
08
Error Checking SDRAM Width 00
tCCD [cycles]
01
Burst Length Supported
0E
Number of Banks on SDRAM 04
Device
CAS Latency
1C
CS Latency
01
Write Latency
02
DIMM Attributes
20
1 GByte
×64
2 Ranks
PC3200S–
3033–1
Rev 1.0
HEX
80
08
07
0D
0B
02
40
00
04
50
50
00
82
08
00
01
0E
04
1C
01
02
20
1 GByte
×64
2 Ranks
PC2700S–
2533–0
Rev 0.0
HEX
80
08
07
0D
0B
02
40
00
04
60
70
00
82
08
00
01
0E
04
0C
01
02
20
1 GByte
×64
2 Ranks
PC2700S–
2533–0
Rev 0.0
HEX
80
08
07
0D
0B
02
40
00
04
60
70
00
82
08
00
01
0E
04
0C
01
02
20
Data Sheet
19
Rev. 0.5, 2003-12