PEB20560 Datasheet, PDF (163/433 Pages) Infineon Technologies AG – ICs for Communications

PEB 20560
Functional Block Description
• When finished, the µP resets OBUSY bit for enabling the OAK to send the next
command. This operation also deactivates the µP-mailbox interrupt.
Note: 1) The OBUSY bit is set only 4 DSP cycles after a OAK write operation to OCMD
register. Therefore, the first polling-read cycle of OBUSYR should take place
at least 5 DSP clock cycles after the write cycle to OCMD.
2) The OAK can write consecutive writes to the OAK mailbox and it’s up to the
user to make sure that the data has been transferred to the µP correctly
(OBUSY has been reset) before writing new data to the OAK mailbox
.
Table 2-27 Register Contents
Register Description
Reset
Value
Bit OAK µP
µP Add. µP Add OAK
Access Access for MSB for LSB Addr.
MCMD µP command 00H
8R
W
none
340_H
C040_H
MBUSYR µP MB busy 0H
1W
R
none
341_H
C041_H
MDT0
µP data reg 0 un-changed 16 R
W
343_H
342_H
C042_H
MDT1
µ^{P data reg 1 un-changed 16 R}
W
345_H
344_H
C044_H
MDT2
µP data reg 1 un-changed 16 R
W
347_H
346_H
C046_H
MDT3
µP data reg 1 un-changed 16 R
W
349_H
348_H
C048_H
MDT4
µP data reg 1 un-changed 16 R
W
34B_H
34A_H
C04A_H
MDT5
µP data reg 1 un-changed 16 R
W
34D_H
34C_H
C04C_H
OCMD OAK command 00H
8W
R
none
350_H
C050_H
OBUSYR OAK MB busy 0H
1R
W
none
351_H
C051_H
ODT0
OAK data
un-changed 16 W
R
reg 0
353_H
352_H
C052_H
ODT1
OAK data
un-changed 16 W
R
reg 1
355_H
354_H
C054_H
ODT2
OAK data
un-changed 16 W
R
reg 2
357_H
356_H
C056_H
ODT3
OAK data
un-changed 16 W
R
reg 3
359_H
358_H
C058_H
ODT4
OAK data
un-changed 16 W
R
reg 4
35B_H
35A_H
C05A_H
ODT5
OAK data
un-changed 16 W
R
reg 5
35D_H
35C_H
C05C_H
Note: The busy bit within MBUSYR and OBUSYR is always read or written at the MSB.
Semiconductor Group
2-117
2003-08