ICE3PCS01G Datasheet, PDF (15/24 Pages) Infineon Technologies AG – Standalone Power Factor Correction (PFC) Controller in Continuous Conduction Mode (CCM)

to keep the VSENSE voltage same as the internal
reference 2.5V as shown in Figure 14.
DBR O2
90 ~ 270 Vac
D BR O1
R BR O1
RBRO2
RBRO 3
BOP
CBR O
2.3/
2. 5V
VCC
Rpullup
RBOFO1
Opto.
BOFO
0.5V
RBOFO2
RBOFO3
GND
C7
C6
Blanking time
L2H 34us
H2L 1us
Blanking time
H2L 4ms
L2H 32ms
VDD
20uA
VBulk
RBVS 1
VSENSE _RBVS2
RBVS 3
CCM-PFC
ICE3PCS01G
Functional Description
VCC
Reg (17V)
PWM Logic
HIGH to
turn on
Gate Driver
LV
Z1
External
MOS
GATE
Figure 14
Boost Follower
The reduced bulk voltage can be designed by upper
side resistance of voltage divider from pin VSENSE.
Thus the low side resistance is designed by the voltage
divider ratio from the reference 2.5V to the rated bulk
voltage. A internal 300kΩ resistor will be paralleled with
external low side resistor of BOFO pin to provide the
adjustable hysteresis for PWM feedback voltage when
boost follower is activated.
The boost follower feature will be disabled internally
during PFC soft-start in order to prevent bulk voltage
oscillation due to the unstable PWM feedback voltage.
This feature can also be disabled externally by pulling
up pin BOFO higher than 0.5V continuously.
* LV: Level Shift
Figure 15 Gate Driver
3.9 Output Gate Driver
The output gate driver is a fast totem pole gate drive. It
has an in-built cross conduction currents protection and
a Zener diode Z1 (see Figure 15) to protect the external
transistor switch against undesirable over voltages.
The maximum voltage at pin 13 (GATE) is typically
clamped at 15V.
The output is active HIGH and at VCC voltages below
the under voltage lockout threshold V_CCUVLO, the gate
drive is internally pull low to maintain the off state.
Version 2.0
15
5 May 2010