TLE7183F Datasheet, PDF (13/28 Pages) Infineon Technologies AG – 3-Phase Bridge Driver IC

TLE7183F
Description and Electrical Characteristics
withstand both, +25 V during operation mode and -V_BAT during INH mode, e.g. a ceramic capacitor. In case of load
dump during INH mode, the negative voltage across CB2 will be clamped to -31 V (CB2 referenced to VDH).
5.1.4 Electrical Characteristics
Electrical Characteristics MOSFET drivers - DC Characteristics
V_S = 5.5 to 20V, T_j = -40 to +150°C, F_PWM < 25kHz, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos. Parameter
Symbol
Limit Values
Unit Conditions
Min. Typ. Max.
5.1.1 Low level output voltage
V_{G_LL}
–
–
5.1.2 High level output voltage, Low Side V_{G_HL}
7.5
–
5.1.3 High level output voltage, High Side V_{G_HL}
6.5
–
5.1.4 High level output voltage
V_{G_HL}
9
–
5.1.5 High level output voltage difference dV_{G_H} –
–
5.1.6 Gate drive output voltage (device V_G(DIS) –
–
disabled via ENAx)
0.2
V
13
V
13
V
13
V
1.0
V
0.2
V
I=30mA
I=-2mA; Vs=5.5..8V
I=-2mA; Vs=5.5..8V
I=-2mA; Vs=8..20V
I=-100mA; Vs=20V
Disabled;
Vs=5.5..20V;
I=10mA
5.1.7
Gate drive output voltage
Tj=-40°C
Tj=25°C
Tj=150°C
V_{G_5}
–
–
V
UVLO; Vs<=5.5V
1.4
1.2
1.0
5.1.8 Gate drive output voltage high side V_{G_HS} –
–
V
Overvoltage
Tj=-40°C
1.4
Tj=25°C
1.2
Tj=150°C
1.0
5.1.9 Gate drive output voltage low side V_{G_LS}
–
–
5.1.10 Low level input voltage of Ixx, ENAx V_{I_LL}
–
–
5.1.11 High level input voltage of Ixx,
ENAx
V_{I_HL}
2.0
–
0.2
V
1.0
V
–
V
Overvoltage
–
–
5.1.12
5.1.13
5.1.14
5.1.15
5.1.16
Low level input voltage of INH
High level input voltage of INH
Input hysteresis of IHx, ILx, ENAx
Input hysteresis of IHx, ILx, ENAx
Output bias current SHx
V_{I_LL}
V_{I_HL}
dV_I
dV_I
I_SHx
–
–
0.75 V
–
2.1
–
–
V
–
50
–
–
mV Vs=5.5..8V
100 200 –-
mV Vs=8..20V
0.3
1.0
1.6
mA VSHx=0..(Vs+1);
ILx=low; IHx=high
5.1.17 Output bias current SLx
I_SLx
0.3
1.0
1.6
mA VSLx=0..7V;
ILx=low; IHx=high
Data Sheet
13
V2.1, 2008-04-30