SLB9665 Datasheet, PDF (12/24 Pages) Infineon Technologies AG – Trusted Platform Module

SLB 9665 TPM2.0
Trusted Platform Module
Pin Description
Table 4-3 Power Supply
Pin Number
Name
PG-TSSOP- PG-VQFN-
28-2
32-13
5, 10, 19, 24 1, 9, 10, 20, VDD
25
4, 11, 18, 25 16, 26, 32 GND
Pin Buffer Function
Type Type
PWR —
GND —
Power Supply
All VDD pins must be connected externally and
should be bypassed to GND via 100 nF capacitors.
Ground
All GND pins must be connected externally.
Table 4-4 Not Connected
Pin Number
Name
PG-TSSOP- PG-VQFN-
28-2
32-13
1, 2, 3, 8, 12, 3, 4, 5, 6, 7, NC
13, 14, 15, 11, 12, 13,
28
14, 15, 17,
29, 30
9
8
NC
Pin Buffer Function
Type Type
NU —
NU —
Not Connected
All pins must not be connected externally (must be
left floating).
Not Connected
This pin may be connected to the Reset signal (for
backward compatibility) or may be left floating.
4.1
Typical Schematic
Figure 4-3 shows the typical schematic for the SLB 9665. The power supply pins should be bypassed to GND
with capacitors located close to the device. The physical presence input may be connected to a jumper as
shown in the schematic; or it may be driven by other devices (this is application- or platform-dependent).
Data Sheet
12
Revision 1.0 2015-10-27