HYS64V64220GBDL Datasheet, PDF (12/13 Pages) Infineon Technologies AG – 144 pin SO-DIMM SDRAM Modules

HYS64V64220GBDL-7/7.5/8-D
144 pin SO-DIMM SDRAM Modules
SPD-Table (cont’d):
Byte#
Description
SPD Entry Value
28 Minimum Row Active to Row Active
delay
29 Minimum RAS to CAS delay
30 Minimum Ras pulse width
31 Module Bank Density (per bank)
32 SDRAM input setup time
33 SDRAM input hold time
34 SDRAM data input setup time
35 SDRAM data input hold time
36-61 Superset information
62 SPD Revision
63 Checksum for bytes 0 - 62
64- Manufactures’s information (optional)
125
126 Frequency Specification
127 Details
128+ Unused storage locations
14/15/16 ns
15/20 ns
42/45 ns
256 MB
2 ns
1 ns
2 ns
1 ns
Revision 1.2
PC100
Hex
64Mx64
-7
0E
0F
2A
15
08
15
08
00
0E
00
Hex
Hex
64Mx64
-7.5
0F
64Mx64
-8
10
14
2D
32
40
15
20
08
10
15
20
08
10
FF
FF
12
37
9A
XX
64
C7
FF
FF
Infineon Technologies
12
2002-08-06