PTF240101S Datasheet, PDF (11/12 Pages) Infineon Technologies AG – Thermally-Enhanced High Power RF LDMOS FET 10 W, 2400-2700 MHz

PTF240101S
Package Outline Specifications
0.38
[.015]
4X R0.25
[R.010]
MAX.
60°
2X 1.27
[.050]
2X 3.30
[.130]
CL
D
Package H-32259-2
1.78
[.070]
2X 0.20±0.03
[.008±.001]
2X 3.30
[.130]
CL
6.86
[.270]
10.16±0.25
[.400±.010]
1.02 [0.040]
0.51 [0.020]
CL
6.35
[.250]SQ
4X 0.51
[.020]
4X 0.25 MAX
[.010]
2.88±.25
[.114±.01]
G
7.37
[.290]
REF
6.86
[.270]
6.48
[.255] SQ
2X 1.65±0.51
[.065±.020]
0°-7°
DRAFT ANGLE
0.74±0.05
[.028±.002]
0.20±0.025
[.008±.001]
LEAD COPLANARITY
BOTTOM OF LEAD
TO BOTTOM OF PACKAGE
.000±.002 (TYP)
H-32259-2-1-2307
S
Diagram Notes—unless otherwise specified:
1. Lead thickness: 0.21 ± 0.03 [.008 ± .001].
2. All tolerances ± 0.127 [.005].
3. Pins: D = drain, S = source, G = gate.
4. Interpret dimensions and tolerances per ASME Y14.5M-1994.
5. Primary dimensions are mm. Alternate dimensions are inches.
6. Gold plating thickness: 2.54 micron [100 microinch] (min).
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Data Sheet
11 of 12
Rev. 05, 2007-04-12