HYS64D128320GU-6-A Datasheet, PDF (10/18 Pages) Infineon Technologies AG – 2.5 V 184-pin Unbuffered DDR-I SDRAM Modules

HYS64/72D64000/128x20GU-7/8-A
Unbuffered DDR-I SDRAM-Modules
Supply Voltage Levels
Parameter
Device Supply Voltage
Output Supply Voltage
Input Reference Voltage
Termination Voltage
EEPROM supply voltage
Symbol
V_DD
V_DDQ
V_REF
V_TT
V_DDSPD
min.
2.3
2.3
0.49 x V_DDQ
V_REF – 0.04
2.3
Limit Values
nom.
max.
2.5
2.7
2.5
2.7
0.5 x V_DDQ
V_REF
2.5
0.51 x V_DDQ
V_REF + 0.04
3.6
Unit Notes
V
–
V
1)
V
2)
V
3)
V
1) _{Under all conditions, VDDQ must be less than or equal to VDD.}
2) _{Peak to peak AC noise on VREF may not exceed ± 2% VREF (DC). VREF is also expected to track noise variations}
in V_DDQ.
3) _{VTT of the transmitting device must track VREF of the receiving device.}
DC Operating Conditions (SSTL_2 Inputs)
(V_DDQ = 2.5 V, T_A = 70 °C, Voltage Referenced to V_SS)
Parameter
Symbol
Limit Values
Unit
Notes
min.
max.
DC Input Logic High
DC Input Logic Low
Input Leakage Current
Output Leakage Current
V_{IH (DC)}
V_REF + 0.15
V_DDQ + 0.3
V
1)
V_{IL (DC)}
– 0.30
V_REF – 0.15
V
–
I_IL
–5
5
µA
2)
I_OL
–5
5
µA
2)
1) _{The relationship between the VDDQ of the driving device and the VREF of the receiving device is what determines}
noise margins. However, in the case of V_{IH (max)} (input overdrive), it is the V_DDQ of the receiving device that is
referenced. In the case where a device is implemented such that it supports SSTL_2 inputs but has no SSTL_2
outputs (such as a translator), and therefore no V_DDQ supply voltage connection, inputs must tolerate input
overdrive to 3.0 V (High corner V_DDQ + 300 mV).
2) _{For any pin under test input of 0 V ≤ VIN ≤ VDDQ + 0.3 V. Values are shown per DDR-SDRAM component.}
INFINEON Technologies
10
2002-09-10 (rev.0.81)