HYS72D32500GR-7F-B Datasheet, PDF (1/22 Pages) Infineon Technologies AG – Low Profile Registered DDR-I SDRAM-Modules

HYS 72Dxx5xxGR-7F/7/8-B
Low Profile Registered DDR-I SDRAM-Modules
2.5 V Low Profile 184-pin Registered DDR-I SDRAM Modules
256MB, 512MB & 1GByte
PC1600 & PC2100
Preliminary Datasheet Revision 0.91
• 184-pin Registered 8-Byte Dual-In-Line
DDR-I SDRAM Module for “1U” PC,
Workstation and Server main memory
applications
• One bank 32M × 72, 64M x 72 and two bank
128M × 72 organization
• JEDEC standard Double Data Rate
Synchronous DRAMs (DDR-I SDRAM) with a
single + 2.5 V (± 0.2 V) power supply
• Built with DDR-I SDRAMs in 66-Lead TSOPII
package
• All inputs and outputs SSTL_2 compatible
• Re-drive for all input signals using register
and PLL devices.
• Serial Presence Detect with E²PROM
• Low Profile Modules form factor:
133.35 mm x 30,40 mm (1.2”) x 4.00 mm
(6,80 mm with stacked components)
• Based on Jedec standard reference card
layouts RawCard “L”, “M”, “N”
• Gold plated contacts
• Programmable CAS Latency, Burst Length,
and Wrap Sequence (Sequential &
Interleave)
• Auto Refresh (CBR) and Self Refresh
• Performance:
-7F
-7
-8
Unit
Component Speed Grade
DDR266F DDR266A DDR200
Module Speed Grade
PC2100 PC2100 PC1600
f_CK Clock Frequency (max.) @ CL = 2.5 143
143
125
MHz
f_CK Clock Frequency (max.) @ CL = 2
133
133
100
MHz
The HYS72Dxx5x0GR are low profile versions of the standard Registered DIMM modules with 1.2”
inch (30,40 mm) height for 1U Server Applications. The Low Profile DIMM versions are available as
32M x 72 (256MB), 64M x 72 (512MB) and 128M x 72 (1 GB).
The memory array is designed with Double Data Rate Synchronous DRAMs for ECC applications.
All control and address signals are re-driven on the DIMM using register devices and a PLL for the
clock distribution. This reduces capacitive loading to the system bus, but adds one cycle to the
SDRAM timing. A variety of decoupling capacitors are mounted on the PC board. The DIMMs
feature serial presence detect based on a serial E²PROM device using the 2-pin I²C protocol. The
first 128 bytes are programmed with configuration data and the second 128 bytes are available to
the customer.
INFINEON Technologies
1
2002-08-16 (0.91)