ICS9P936 Datasheet, PDF (9/12 Pages) Integrated Device Technology – Low Skew Dual Bank DDR I/II Fan-out Buffer

ICS9P936
Low Skew Dual Bank DDR I/II Fan-out Buffer
I²C Table: Output Control Register
Byte 7
Pin #
Name
Bit 7
-
BUFF_IN_T/C
Bit 6
-
FB_OUT_T/C
Bit 5
-
DDR_T5/C5
Bit 4
-
DDR_T4/C4
Bit 3
-
DDR_T3/C3
Bit 2
-
DDR_T2/C2
Bit 1
-
DDR_T1/C1
Bit 0
-
DDR_T0/C0
Control Function
Frequency Detect
FB_OUT Control
Output Control
Output Control
Output Control
Output Control
Output Control
Output Control
Type
RW
RW
RW
RW
RW
RW
RW
RW
I²C Table: Byte Count Register
Byte 8
Pin #
Name
Bit 7
-
BC7
Bit 6
-
BC6
Bit 5
-
BC5
Bit 4
-
BC4
Bit 3
-
BC3
Bit 2
-
BC2
Bit 1
-
BC1
Bit 0
-
BC0
Control Function
Byte Count
Programming b(7:0)
Type
RW
RW
RW
RW
RW
RW
RW
RW
I²C Table: Group Skew Control Register
Byte 19
Pin #
Name
Bit 7
-
DDR_CSkw3
Bit 6
-
Bit 5
-
DDR_CSkw2
DDR_CSkw1
Bit 4
-
DDR_CSkw0
Bit 3
-
Bit 2
-
Reserved
Reserved
Bit 1
-
FBOUTSkw1
Bit 0
-
FBOUTSkw0
I²C Table: Group Skew Control Register
Byte 20
Pin #
Name
Bit 7
-
Bit 6
-
Bit 5
-
DDR_TSkw3
DDR_TSkw2
DDR_TSkw1
Bit 4
-
DDR_TSkw0
Bit 3
-
Reserved
Bit 2
-
Reserved
Bit 1
-
Bit 0
-
Reserved
Reserved
Control Function
DDR_C Skew Control
(also see table1)
Reserved
Reserved
FB_OUT Skew Control
(also see table 2)
Control Function
DDR_T Skew Control
(also see table1)
Reserved
Reserved
Reserved
Reserved
Type
RW
RW
RW
RW
RW
RW
RW
RW
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
OFF
Disable
Disable
Disable
Disable
Disable
Disable
Disable
1
ON
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Default
1
1
1
1
1
1
1
1
0
1
Writing to this register will
configure how many bytes
will be read back, default is
0h = 15 bytes
Default
0
0
0
0
1
1
1
1
0
0000 = 0
0100 = 150
1000 = 300
1100 = 450
Reserved
Reserved
00 = 0
01 = 250
1
1101 = 600
1110 = 750
1111 = 900
N/A
Reserved
Reserved
10 = 500
11 = 750
Default
0
0
0
0
0
0
0
0
0
0000 = 0
0100 = 150
1000 = 300
1100 = 450
Reserved
Reserved
Reserved
Reserved
1
1101 = 600
1110 = 750
1111 = 900
N/A
Reserved
Reserved
Reserved
Reserved
Default
0
0
0
0
0
0
0
0
Note: Bytes not shown are reserved and should not be altered.
IDT^TM/ICS^TM Low Skew Dual Bank DDR I/II Fan-out Buffer
9
1084C 12/03/09