ICS9P936 Datasheet, PDF (12/12 Pages) Integrated Device Technology – Low Skew Dual Bank DDR I/II Fan-out Buffer

ICS9P936
Low Skew Dual Bank DDR I/II Fan-out Buffer
Revision History
Rev. Issue Date Description
0.1 3/23/2005 Updated Electrical Characteristics
0.2 4/1/2005 Updated Skew programming bytes and I2c programming address
0.3 9/12/2005 Updated LF Ordering Information
0.4 9/14/2005 Added TSSOP Ordering Information.
0.5 11/13/2006 Updated I2C.
0.6 4/5/2007 Updated Switching Characteristics.
0.7 6/26/2007 Updated Max Clock Frequency.
A
4/8/2009 Released to final.
1. Updated all electrical tables to specify VDDQ = 1.8V and 2.5V.
B 11/12/2009 2. Updated ordering information table
3. Updated pinout and pin descriptions
1.Corrected Byte 19/20 default to 00 hex.
C 12/2/2009 2.Corrected typos in electrical tables, made formatting improvements
for readability.
Page #
5-9
3, 10
11
12
3
6
1, 7, 10
Various
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