932QL456 Datasheet, PDF (9/23 Pages) Integrated Device Technology – Low-Power CK420BQ Derivative for PCIe

932SQL456 DATASHEET
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the 932SQL456. These ratings, which are standard
values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other
conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the
recommended operating temperature range.
PARAMETER
SYMBOL
CONDITIONS
MIN
3.3V Core Supply Voltage VDDA
3.3V Logic Supply Voltage VDD
Input Low Voltage
V_IL
GND-0.5
Input High Voltage
V_IH
Except for SMBus interface
Input High Voltage
V_IHSMB
SMBus clock and data pins
Storage Temperature
Ts
-65
Junction Temperature
Tj
Case Temperature
Tc
Input ESD protection ESD prot
Human Body Model
2000
1_{Guaranteed by design and characterization, not 100% tested in production.}
2 _{Operation under these conditions is neither implied nor guaranteed.}
TYP
MAX
4.6
4.6
V_DD+0.5V
5.5V
150
125
110
UNITS
V
V
V
V
V
°_C
°C
°C
V
NOTES
1,2
1,2
1
1
1
1
1
1
1
Electrical Characteristics–Current Consumption
TA = T_AMB; Supply Voltage VDDx = 3.3 V +/-5%
PARAMETER
SYMBOL
CONDITIONS
MIN
Operating Supply Current I_DD3.3OP
All outputs active @100MHz,
C_L = Full load;
Powerdown Current
I_DD3.3PDZ
1_{Guaranteed by design and characterization, not 100% tested in production.}
TYP
217
4.3
MAX
250
8
UNITS NOTES
mA
1
mA
1
AC Electrical Characteristics–CPU, SRC, NS_SAS, NS_SRC, DOT96 LP-HCSL
Outputs
TA = T_AMB; Supply Voltage VDDx = 3.3 V +/-5%
PARAMETER
SYMBOL
CONDITIONS
MIN
Duty Cycle
t_DC
Measured differentially, PLL
45
Mode
Skew, Output to Output
Skew, Output to Output
Jitter, Cycle to cycle
t_sk3SRC
t_sk3CPU
t_jcyc-cyc
Across all SRC outputs,
V_T = 50%
Across all CPU outputs,
V_T = 50%
CPU, SRC, NS_SAS outputs
DOT96 output
1_{Guaranteed by design and characterization, not 100% tested in production.}
2 _{Zo=85Ω (differential impedance).}
3 _{Measured from differential waveform}
TYP
49.6%
23
24
6
5
MAX
55
UNITS NOTES
%
50
ps
1
50
ps
1
50
ps
1,3
50
ps
1,3
REVISION B 09/29/15
9
LOW-POWER CK420BQ DERIVATIVE FOR PCIE SEPARATE CLOCK ARCHITECTURES