932QL456 Datasheet, PDF (12/23 Pages) Integrated Device Technology – Low-Power CK420BQ Derivative for PCIe

932SQL456 DATASHEET
Electrical Characteristics–PCI
TA = T_AMB; Supply Voltage VDDx = 3.3 V +/-5%
PARAMETER
SYMBOL
CONDITIONS
Output High Voltage
V_OH
I_OH = -1 mA
Output Low Voltage
V_OL
I_OL = 1 mA
Clock High Time
T_HIGH
1.5V
MIN
TYP
MAX UNITS NOTES
2.4
V
0.55
V
12
ns
1
Clock Low Time
T_LOW
1.5V
12
Edge Rate
t_slewr/f
Rising/Falling edge rate
1
Duty Cycle
d_t1
V_T = 1.5 V
45
Group Skew
t_skew
V_T = 1.5 V
Jitter, Cycle to cycle
t_jcyc-cyc
V_T = 1.5 V
See "Power Supply and Test Loads" page for termination circuits
1_{Guaranteed by design and characterization, not 100% tested in production.}
2 _{Measured between 0.8V and 2.0V}
1.7
50.6
496
23
ns
1
4
V/ns 1,2
55
%
1
550
ps
1
250
ps
1
Electrical Characteristics–Phase Jitter Parameters
TA = T_AMB; Supply Voltage VDDx = 3.3 V +/-5%
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
IND.
LIMIT
t_jphPCIeG1
PCIe Gen 1
24.8
30
86
Phase Jitter
PCIe Gen 2 Lo Band
t_jphPCIeG2
10kHz < f < 1.5MHz
PCIe Gen 2 High Band
1.5MHz < f < Nyquist (50MHz)
PCIe Gen 3 Common Clock
t_jphPCIeG3Com (PLL BW of 2-4MHz. CDR =
10MHz)
PCIe Gen 3 Separate
t_jphPCIeG3SRn Reference no Spread (SRnS)
S
(PLL BW of 2-4MHz. CDR =
10MHz)
QPI & SMI
(100MHz, 4.8Gb/s, 6.4Gb/s
12UI)
t_{jphQPI_SMI}
QPI & SMI
(100MHz, 8.0Gb/s, 12UI)
QPI & SMI
(100MHz, 9.6Gb/s, 12UI)
0.54
0.7
3
2.2
2.6/3
3.1
0.46
0.6
1
0.46
0.6
0.7
0.24
0.4
0.5
0.13
0.15
0.3
0.11
0.13
0.2
t_jphSAS12G
SAS 12G
0.84
1.1/1.2 1.3
1 _{Guaranteed by design and characterization, not 100% tested in production.}
2 _{See http://www.pcisig.com for complete specs}
3 _{Sample size of at least 100K cycles. This figures extrapolates to 108ps pk-pk @ 1M cycles for a BER of 1-12.}
4 _{Subject to final radification by PCI SIG.}
5 _{Calculated from Intel-supplied Clock Jitter Tool v 1.6.6}
6 _{Applied to SRC, CPU and NS_SRC, NS_SAS outputs, second figure if present applies to -40C.}
UNITS Notes
ps (p-p)
ps
(rms)
ps
(rms)
1,2,3,
6
1,2,6
1,2,6
ps 1,2,4,
(rms) 6
ps 1,2,4,
(rms) 6
ps
(rms)
ps
(rms)
ps
(rms)
ps
(rms)
1,5,6
1,5,6
1,5,6
1,5,6
LOW-POWER CK420BQ DERIVATIVE FOR PCIE SEPARATE CLOCK ARCHITECTURES
12
REVISION B 09/29/15