843034-06 Datasheet, PDF (9/24 Pages) Integrated Device Technology – FemtoClock™ Multi-Rate 3.3V LVPECL Frequency Synthesizer

843034-06 DATA SHEET
TABLE 8. AC CHARACTERISTICS, V = V = V = V
= 3.3V±5%, V = 0V, TA = 0°C TO 75°C
CC
CCO_A
CCO_B
CCO_REF
EE
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
FOUT Output Frequency
120
375
MHz
tjit(Ø)
Phase Jitter, RMS (Random), SSC-Off
NOTE 1, 2
166.6MHz,
Integration Range:
12kHz - 30MHz
1.33
ps
tjit(cc) Cycle-to-Cycle Jitter; NOTE 2, 3, 4
35
ps
tsk(o) Output Skew; NOTE 2, 4, 5
120
ps
tR / tF
Output
Rise/Fall Time
LVPECL Outputs
20% to 80%
200
700
ps
M, N to nP_LOAD
5
ns
tS
Setup Time S_DATA to S_CLOCK
5
ns
S_CLOCK to S_LOAD
5
ns
M, N to nP_LOAD
5
ns
tH
Hold Time
S_DATA to S_CLOCK
5
ns
S_CLOCK to S_LOAD
5
ns
odc
Output Duty Cycle
N = 4 or N = 5
48
N=2
45
52
%
55
%
tLOCK PLL Lock Time
100
ms
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established
when the device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet
specifications after thermal equilibrium has been reached under these conditons.“
NOTE: Characterized using a 22.22MHz crystal producing a VCO frequency of 666.66MHz, unless otherwise noted.
NOTE: See Parameter Measurement Information section.
NOTE 1: Please refer to the Phase Noise Plot.
NOTE 2: Characterized with REF_OUT output disabled.
NOTE 3: Jitter performance using XTAL inputs.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 5: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
REVISION B 8/17/15
9
FemtoClock™ Multi-Rate 3.3V LVPECL Frequency Synthesizer