ICS9EX21801A Datasheet, PDF (8/14 Pages) Integrated Device Technology – 18 Output PCIe G2/QPI Differential Buffer with 2:1 input mux

ICS9EX21801A
18 Output PCIe G2/QPI Differential Buffer with 2:1 input mux
Datasheet
Electrical Characteristics - Phase Jitter (PLL Mode)
PARAMETER
PLL Bandwidth
PLL Bandwidth
PLL Jitter Peaking
PLL Jitter Peaking
SYMBOL
BWH
BWL
jPKH
jPKL
tjphase_LoBW
CONDITIONS*
High Bandwidth Selected
Low Bandwidth Selected
High Bandwidth Selected
Low Bandwidth Selected
PCIe Gen 1
(1.5 - 22 MHz)
PCIe Gen 2
(8-16 MHz, 5-16 MHz)
Lo-band content (10kHz to 1.5MHz)
PCIe Gen 2
(8-16 MHz, 5-16 MHz)
Hi-band content (1.5MHz to Nyquist)
QPI_133MHz (4.8Gb, 12 UI)
NOTES
MIN
TYP.
MAX UNITS
2
3
4
MHz
0.7
1
2
MHz
2.5
3
dB
2
2.5
dB
36/42
108
ps
1,2
1.1/1.2
3 ps rms 1,2
2.0/2.1 3.1 ps rms 1,2
0.24/0.25 0.5 ps rms 2, 3
Jitter, Phase
QPI_133MHz (6.4Gb, 12 UI)
tjphase_HIBW
PCIe Gen 1
(1.5 - 22 MHz)
PCIe Gen 2
(8-16 MHz, 5-16 MHz)
Lo-band content (10kHz to 1.5MHz)
PCIe Gen 2
(8-16 MHz, 5-16 MHz)
Hi-band content (1.5MHz to Nyquist)
QPI_133MHz (4.8Gb, 12 UI)
0.18/0.19 0.5 ps rms 2, 3
28/32
86
ps 1,2
1.2/1.5
3 ps rms 1,2
2.6/2.7 3.1 ps rms 1,2
0.27/0.28 0.5 ps rms 2, 3
QPI_133MHz (6.4Gb, 12 UI)
0.2/0.21 0.5 ps rms 2, 3
Notes on Phase Jitter: (Guaranteed by design and characterization, not tested in production)
1 _{See http://www.pcisig.com for complete specs. First number is Spread Spectrum Off, second is Spread Spectrum On.}
2 _{Device driven by IDT CK410B+ (932S421CGLF) or CK509B (932S509EKLF) or equivalent}
3 _{Calculated from Intel Supplied Clock Jitter Tool 1.5.1. First number is Spread Spectrum Off, second is Spread Spectrum On}
IDT^TM 18 Output PCIe G2/QPI Differential Buffer with 2:1 input mux
8
1463B — 01/20/10