ICS9EX21801A Datasheet, PDF (12/14 Pages) Integrated Device Technology – 18 Output PCIe G2/QPI Differential Buffer with 2:1 input mux

ICS9EX21801A
18 Output PCIe G2/QPI Differential Buffer with 2:1 input mux
Datasheet
SMBusTable: Output Enable Readback Register
Byte 4 Pin #
Name
Control Function
Bit 7
RESERVED
Bit 6
RESERVED
Bit 5
62
100M_133M# Input
Pin Readback
Bit 4
68
SEL_A_B# Input
Pin Readback
Bit 3
22
OE15_17# Input
Pin Readback
Bit 2
18
OE14# Input
Pin Readback
Bit 1
15
OE13# Input
Pin Readback
Bit 0
8
OE12# Input
Pin Readback
Type
R
R
R
R
R
R
0
133M
Input B
Pin Low
Pin Low
Pin Low
Pin Low
1
100M
Input A
Pin Hi
Pin Hi
Pin Hi
Pin Hi
PWD
0
0
X
X
X
X
X
X
Note: For an output to be enabled, BOTH the Output Enable Bit and the OE# pin must be enabled.
This means that the Output Enable Bit must be '1' and the corresponding OE# pin must be '0'.
SMBusTable: Vendor & Revision ID Register
Byte 5 Pin #
Name
Control Function
Type
0
Bit 7
-
RID3
R
-
Bit 6
-
Bit 5
-
RID2
RID1
REVISION ID
R
R
-
-
Bit 4
-
RID0
R
-
Bit 3
-
VID3
R
-
Bit 2
-
Bit 1
-
VID2
VID1
VENDOR ID
R
-
R
-
Bit 0
-
VID0
R
-
1
PWD
-
0
-
0
-
0
-
1
-
0
-
0
-
0
-
1
SMBusTable: DEVICE ID
Byte 6 Pin #
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
Name
Control Function
Device ID 7 (MSB)
Device ID 6
Device ID 5
Device ID 4
Device ID 3
Device ID 2
Device ID 1
Device ID 0
Type
R
R
R
R
R
R
R
R
0
1
Device ID is 18 hex
PWD
0
0
0
1
1
0
0
0
SMBusTable: Byte Count Register
Byte 7 Pin #
Name
Bit 7
-
BC7
Bit 6
-
BC6
Bit 5
-
BC5
Bit 4
-
BC4
Bit 3
-
BC3
Bit 2
-
BC2
Bit 1
-
BC1
Bit 0
-
BC0
Control Function
Type
0
RW
-
RW
-
Writing to this register ^RW
-
configures how many
RW
-
bytes will be read back.
RW
RW
-
-
RW
-
RW
-
1
PWD
-
0
-
0
-
0
-
0
-
0
-
1
-
1
-
1
IDT^TM 18 Output PCIe G2/QPI Differential Buffer with 2:1 input mux
12
1463B — 01/20/10