ICS9EX21801A Datasheet, PDF (11/14 Pages) Integrated Device Technology – 18 Output PCIe G2/QPI Differential Buffer with 2:1 input mux

ICS9EX21801A
18 Output PCIe G2/QPI Differential Buffer with 2:1 input mux
Datasheet
SMBusTable: Output, and PLL BW Control Register
Byte 0 Pin #
Name
Control Function
Bit 7
4
Bit 6
PLL_BW# adjust
BYPASS# test mode / PLL
Bit 5
Bit 4
Bit 3
Bit 2
-
Bit 1
-
Bit 0
-
DIF_17
DIF_16
100M_133M#
FSB
FSA
Output Control
Output Control
RESERVED
Frequency Select Bit C
Frequency Select Bit B
Frequency Select bit A
Type
RW
RW
RW
RW
RW
RW
RW
0
1
00 = Low BW (1MHz)
10 = Bypass
11 = High BW (3MHz)
Hi-Z
Enable
Hi-Z
Enable
133MHz 100MHz
See Frequency Select
Table
PWD
Latch
Latch
1
1
0
Latch
0
1
SMBusTable: Output Control Register
Byte 1 Pin #
Name
Bit 7
DIF_7
Bit 6
DIF_6
Bit 5
DIF_5
Bit 4
DIF_4
Bit 3
DIF_3
Bit 2
DIF_2
Bit 1
DIF_1
Bit 0
DIF_0
Control Function
Type
0
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
1
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
PWD
1
1
1
1
1
1
1
1
SMBusTable: Output Control Register
Byte 2
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Pin #
Name
DIF_15
DIF_14
DIF_13
DIF_12
DIF_11
Bit 2
DIF_10
Bit 1
DIF_9
Bit 0
DIF_8
Control Function
Type
0
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
Output Control
RW
Hi-Z
1
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
PWD
1
1
1
1
1
1
1
1
SMBusTable: Output Enable Readback Register
Byte 3 Pin #
Name
Control Function
Bit 7
5
OE11# Input
Pin Readback
Bit 6
2
OE10# Input
Pin Readback
Bit 5
72
OE9# Input
Pin Readback
Bit 4
59
OE8# Input
Pin Readback
Bit 3
56
OE7# Input
Pin Readback
Bit 2
52
Bit 1
49
Bit 0
36
OE6# Input
OE5# Input
OE_01234# Input
Pin Readback
Pin Readback
Pin Readback
Type
R
R
R
R
R
R
R
R
0
Pin Low
Pin Low
Pin Low
Pin Low
Pin Low
Pin Low
Pin Low
Pin Low
1
Pin Hi
Pin Hi
Pin Hi
Pin Hi
Pin Hi
Pin Hi
Pin Hi
Pin Hi
PWD
X
X
X
X
X
X
X
X
IDT^TM 18 Output PCIe G2/QPI Differential Buffer with 2:1 input mux
11
1463B — 01/20/10