ICS952003 Datasheet, PDF (8/18 Pages) Integrated Circuit Systems – Programmable Timing Control Hub for P4™ processor

Integrated
Circuit
Systems, Inc.
ICS952003
Preliminary Product Review
Byte 13: Spread Spectrum Control Register
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
SS 7
SS 6
SS 5
SS 4
SS 3
SS 2
SS 1
SS 0
PWD
Description
X
X
The Spread Spectrum (12:0) bit will
program the spread precentage. Spread
X _{precent needs to be calculated based on}
X _{the VCO frequency, spreading profile,}
X ^{spreading amount and spread frequency. It}
X
X
is recommended to use ICS software for
spread programming. Default power on is
latched FS divider.
X
Byte 14: Spread Spectrum Control Register
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
Reserved
Reserved
Reserved
SS 12
SS 11
SS 10
SS 9
SS 8
PWD
Description
X Reserved
X Reserved
X Reserved
X Spread Spectrum Bit 12
X Spread Spectrum Bit 11
X Spread Spectrum Bit 10
X Spread Spectrum Bit 9
X Spread Spectrum Bit 8
Byte 15: Output Divider Control Register
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
SD Div 3
SD Div 2
SD Div 1
SD Div 0
CPU Div 3
CPU Div 2
CPU Div 1
CPU Div 0
PWD
X
X
X
X
X
X
X
X
Description
SDRAM clock divider ratio can be
configured via these 4 bits individually.
For divider selection table refer to
Table 1. Default at power up is latched
FS divider.
CPUCLKT/C clock divider ratio can be
configured via these 4 bits individually.
For divider selection table refer to
Table 1. Default at power up is latched
FS divider.
Byte 16: Output Divider Control Register
Bit
Bit 7
Name
AGP Div 3
PWD
X
Bit 6
AGP Div 2
X
Bit 5
AGP Div 1
X
Bit 4
AGP Div 0
X
Bit 3
ZCLK Div 3
X
Bit 2
ZCLK Div 2
X
Bit 1
ZCLK Div 1
X
Bit 0
ZCLK Div 0
X
Description
AGP clock divider ratio can be
configured via these 4 bits
individually. For divider selection
table refer to Table 1. Default at
power up is latched FS divider.
ZCLK clock divider ratio can be
configured via these 4 bits
individually. For divider selection
table refer to Table 1. Default at
power up is latched FS divider.
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