ICS932S421B Datasheet, PDF (8/23 Pages) Integrated Device Technology – PCIe Gen2 and QPI Clock for Intel-Based Servers

ICS932S421B
PCIe Gen2 and QPI Clock for Intel-Based Servers
Electrical Characteristics - PCICLK/PCICLK_F
PARAMETER
SYMBOL
CONDITIONS*
MIN
TYP
Long Accuracy
ppm see Tperiod min-max values
-100
Clock period
T_period
33.33MHz output nominal
29.9970
30
Absolute Clock period
T_pabs 33.33MHz output including jitter 29.4970
Clock period w/spread
Absolute Clock period
w/spread
T_periodSS 33.33MHz output nominal
30.0722 30.07519
T_pabsSS 33.33MHz output including jitter 29.5722
Clock High Time
T_HIGH
1.5V
12
Clock Low Time
T_LOW
1.5V
12
Output Impedance
R_DSP
V_O = V_DD*(0.5)
12
Output High Voltage
V_OH
I_OH = -1 mA
2.4
Output Low Voltage
V_OL
I_OL = 1 mA
Output High Current
I_OH
V _OH @MIN = 1.0 V
V_OH@MAX = 3.135 V
-33
Output Low Current
I_OL
V_OL @ MIN = 1.95 V
V_OL @ MAX = 0.4 V
30
Edge Rate
t_slewr/f
Rising/Falling edge rate
1
Rise Time
t_r
V_OL = 0.4 V, V_OH = 2.4 V
0.5
Fall Time
t_f
V_OH = 2.4 V, V_OL = 0.4 V
0.5
Duty Cycle
d_t1
V_T = 1.5 V
45
Group Skew
t_skew
V_T = 1.5 V
Jitter, Cycle to cycle
t_jcyc-cyc
V_T = 1.5 V
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5% (unless otherwise specified)
1_{Guaranteed by design and characterization, not 100% tested in production.}
2 _{All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REF is at 14.31818MHz}
3 _{Does not apply to 932S431A}
MAX
100
30.0030
30.5030
30.0852
30.5852
N/A
N/A
55
0.55
-33
38
4
2
2
55
250
500
UNITS NOTES
ppm 1,2
ns
2
ns
2
ns
2, 3
ns
2,3
ns
1
ns
1
8
1
V
1
V
1
mA
1
mA
1
mA
1
mA
1
V/ns
1
ns
1
ns
1
%
1
ps
1
ps
1
IDT^TM PCIe Gen2 and QPI Clock for Intel-Based Servers
8
1340G—01/26/10