ICS932S421B Datasheet, PDF(17/23 Page) Integrated Device Technology – PCIe Gen2 and QPI Clock for Intel-Based Servers

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ICS932S421B Datasheet, PDF (17/23 Pages) Integrated Device Technology – PCIe Gen2 and QPI Clock for Intel-Based Servers

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ICS932S421B

PCIe Gen2 and QPI Clock for Intel-Based Servers

SMBus Table: SRC/PCI Frequency Control Register

Byte 15

Pin #

Name

Bit 7

SRC N Div8

Bit 6

SRC N Div9

Bit 5

SRC M Div5

Bit 4

SRC M Div4

Bit 3

SRC M Div3

Bit 2

SRC M Div2

Bit 1

SRC M Div1

Bit 0

SRC M Div0

Control Function

N Divider Prog bit 8

N Divider Prog bit 9

M Divider Programming

bits

Type

PWD

RW The decimal representation of X

RW M and N Divider in Byte 15 and X

RW 16 will configure the SRC VCO X

frequency. Default at power up

RW = latch-in or Byte 0 Rom table. X

RW VCO Frequency = 14.318 x

RW [NDiv(9:0)+8] / [MDiv(5:0)+2] X

SMBus Table: SRC/PCI Frequency Control Register

Byte 16

Pin #

Name

Bit 7

SRC N Div7

Bit 6

SRC N Div6

Bit 5

SRC N Div5

Bit 4

SRC N Div4

Bit 3

SRC N Div3

Bit 2

SRC N Div2

Bit 1

SRC N Div1

Bit 0

SRC N Div0

Control Function

N Divider Programming

b(7:0)

Type

PWD

RW The decimal representation of X

RW M and N Divider in Byte 15 and X

RW 16 will configure the SRC VCO X

frequency. Default at power up

RW = latch-in or Byte 0 Rom table. X

RW VCO Frequency = 14.318 x

RW [NDiv(9:0)+8] / [MDiv(5:0)+2] X

SMBus Table: SRC/PCI Spread Spectrum Control Register

Byte 17

Pin #

Name

Control Function

Bit 7

SRC SSP7

Bit 6

SRC SSP6

Bit 5

SRC SSP5

Bit 4

Bit 3

SRC SSP4

SRC SSP3

Spread Spectrum

Programming b(7:0)

Bit 2

SRC SSP2

Bit 1

SRC SSP1

Bit 0

SRC SSP0

Type

PWD

RW These Spread Spectrum bits in X

Byte 17 and 18 will program the

spread pecentage of SRC

SMBus Table: SRC/PCI Spread Spectrum Control Register

Byte 18

Pin #

Name

Control Function

Bit 7

Reserved

Bit 6

SRC SSP14

Bit 5

SRC SSP13

Bit 4

Bit 3

Bit 2

SRC SSP12

SRC SSP11

SRC SSP10

Spread Spectrum

Programming b(14:8)

Bit 1

SRC SSP9

Bit 0

SRC SSP8

Type

PWD

RW These Spread Spectrum bits in X

RW Byte 17 and 18 will program the X

RW spread pecentage of SRC

IDTTM PCIe Gen2 and QPI Clock for Intel-Based Servers

1340Gâ01/26/10

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