ICS851S201I Datasheet, PDF (8/17 Pages) Integrated Device Technology – 2:1 Differential-to-HCSL Multiplexer with Low Input Level Alarm

ICS851S201I Data Sheet
Applications Information
2:1 DIFFERENTIAL-TO-HCSL MULTIPLEXER
Recommendations for Unused Input and Output Pins
Inputs:
CLK/nCLK Inputs
For applications not requiring the use of a differential input, both the
CLK and nCLK pins can be left floating. Though not required, but for
additional protection, a 1k resistor can be tied from CLK to ground.
LVCMOS Control Pins
All control pins have internal pulldowns; additional resistance is not
required but can be added for additional protection. A 1k resistor
can be used.
Outputs:
Differential Outputs
All unused differential outputs can be left floating. We recommend
that there is no trace attached. Both sides of the differential output
pair should either be left floating or terminated.
Differential Clock Input Interface
The CLK /nCLK accepts HCSL and other differential signals. Both
differential signals must meet the V_PP and V_CMR input requirements.
Figure 2 shows interface examples for the CLK/nCLK input driven by
the most common driver types. The input interfaces suggested here
are examples only. Please consult with the vendor of the driver
component to confirm the driver termination requirements.
3.3V
*R3
*R4
HCSL
3.3V
CLK
nCLK
Differential
Input
Figure 2. CLK/nCLK Input Driven by a 3.3V HCSL Driver
ICS851S201CKI MAY 27, 2017
8
©2017 Integrated Device Technology, Inc.