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ICS851S201I Datasheet, PDF (12/17 Pages) Integrated Device Technology – 2:1 Differential-to-HCSL Multiplexer with Low Input Level Alarm
ICS851S201I Data Sheet
2:1 DIFFERENTIAL-TO-HCSL MULTIPLEXER
3. Calculations and Equations.
The purpose of this section is to calculate power dissipation on the IC per HCSL output pair.
HCSL output driver circuit and termination are shown in Figure 6.
VDD
IOUT = 17mA
RREF =
475 ± 1%
VOUT
RL
50
IC
Figure 6. HCSL Driver Circuit and Termination
HCSL is a current steering output which sources a maximum of 17mA of current per output. To calculate worst case on-chip power dissipation,
use the following equations which assume a 50 load to ground.
The highest power dissipation occurs when VDD_MAX.
Power = (VDD_MAX – VOUT) * IOUT
since VOUT = IOUT * RL
Power = (VDD_MAX – IOUT * RL) * IOUT
= (3.465V – 17mA * 50) * 17mA
Total Power Dissipation per output pair = 44.5mW
ICS851S201CKI MAY 27, 2017
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