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ICS851S201I Datasheet, PDF (1/17 Pages) Integrated Device Technology – 2:1 Differential-to-HCSL Multiplexer with Low Input Level Alarm
2:1 Differential-to-HCSL Multiplexer
with Low Input Level Alarm
ICS851S201I
DATASHEET
General Description
The ICS851S201I is a high performance 2:1 Differential-to-HCSL
Multiplexer with a 2 output fanout buffer. The ICS851S201I operates
up to 250MHz and accepts HCSL and other low level differential
inputs levels. Input level detection circuitry is available to flag input
levels that drops below a specified value and on the selected input.
This signal is latched until the status is reset via the alarm reset
input. The ICS851S201I is packaged in a small 3mm x 3mm 16 lead
VFQFN package, making it ideal for use on space constrained
boards.
Features
• Two differential HCSL output pairs
• Two selectable differential clock input pairs
• CLKx, nCLKx pairs can accept HCSL level inputs
• Low level input detection on selected input (latched)
• Maximum Input frequency: 250MHz
• Output skew: 5ps (typical)
• Propagation delay: 1.4ns (typical)
• Additive RMS phase jitter at 133.33MHz (12kHz - 20MHz):
0.151ps (typical)
• Full 3.3V operating supply
• -40°C to 85°C ambient operating temperature
• Lead-free (RoHS 6) packaging
Block Diagram
CLK0 Pulldown
nCLK0 Pullup/Pulldown
0
CLK1 Pulldown
nCLK1 Pullup/Pulldown
1
CLK_SEL Pulldown
IREF
LLAR Pulldown
Pin Assignment
Q0
nQ0
Q1
nQ1
LLA
16 15 14 13
CLK0 1
12 nQ0
nCLK0 2
11 Q0
CLK1 3
10 nQ1
nCLK1 4
9 Q1
5 6 78
ICS851S201I
16-Lead VFQFN
Top View
ICS851S201CKI MAY 27, 2017
1
©2017 Integrated Device Technology, Inc.