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| DT8SLVD1204I Datasheet, PDF (8/18 Pages) Integrated Device Technology – Two selectable differential clock input pairs | |||
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IDT8SLVD1204I DATA SHEET
Parameter Measurement Information, continued
nPCLK0
PCLK0
nPCLK1
PCLK1
nQ[0:3]
Q[0:3]
Input Skew
tPD2
tPD1
tsk(i)
tsk(i) = |tPD1 - tPD2|
Spectrum of Output Signal Q
A0
MUX selects active
input clock signal
MUX_ISOLATION = A0 â A1
A1
MUX selects other input
MUX Isolation
Æ
(fundamental)
Frequency
nPCLK[0:1]
PCLK[0:1]
nQ[0:3]
Q[0:3]
tPD
Propagation Delay
Offset Voltage Setup
Differential Output Voltage Setup
2:4, LVDS OUTPUT FANOUT BUFFER, 2.5V
8
REVISION A 07/10/14
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