ICS9LPRS464 Datasheet, PDF (7/23 Pages) Integrated Device Technology – System Clock Chip for ATI RS/RD600 series chipsets using AMD CPUs

ICS9LPRS464
System Clock Chip for ATI RS/RD600 series chipsets using AMD CPUss
AC Electrical Characteristics - Low-Power DIF Outputs: SRC and ATIG
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS NOTES
Rising Edge Slew Rate
t_SLR
Differential Measurement
0.5
2
V/ns
1,2
Falling Edge Slew Rate
t_FLR
Differential Measurement
0.5
2
V/ns
Slew Rate Variation
Maximum Output Voltage
Minimum Output Voltage
Differential Voltage Swing
Crossing Point Voltage
Crossing Point Variation
Duty Cycle
SRC, ATIG, Jitter - Cycle to
Cycle
t_SLVAR
V_HIGH
V_LOW
V_SWING
V_XABS
V_XABSVAR
D_CYC
SRCJ_C2C
Single-ended Measurement
Includes overshoot
Includes undershoot
Differential Measurement
Single-ended Measurement
Single-ended Measurement
Differential Measurement
Differential Measurement
-300
300
300
45
20
%
1150
mV
mV
mV
550
mV
140
mV
55
%
125
ps
SRC[5:0] Skew
SRC_SKEW Differential Measurement
SB_SRC[1:0] Skew
SRC_SKEW Differential Measurement
ATIG[3:0] Skew
SRC_SKEW Differential Measurement
1_{Guaranteed by design and characterization, not 100% tested in production.}
250
ps
100
ps
100
ps
2 _{Slew rate measured through Vswing centered around differential zero}
3 _{Vxabs is defined as the voltage where CLK = CLK#}
4 _{Only applies to the differential rising edge (CLK rising and CLK# falling)}
5 _{Defined as the total variation of all crossing voltages of CLK rising and CLK# falling. Matching applies to rising edge rate of}
6 _{All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REFOUT is at 14.31818MHz}
1,2
1
1
1
1
1,3,4
1,3,5
1
1
1
1
1
Electrical Characteristics - USB - 48MHz
PARAMETER
SYMBOL
CONDITIONS*
MIN
TYP
Long Accuracy
ppm
see Tperiod min-max values
-100
Clock period
T_period
48.00MHz output nominal
20.8229
Clock Low Time
T_low
Measure from < 0.6V
9.3750
Clock High Time
T_high
Measure from > 2.0V
9.3750
Output High Voltage
V_OH
I_OH = -1 mA
2.4
Output Low Voltage
V_OL
I_OL = 1 mA
Output High Current
I_OH
V _OH @MIN = 1.0 V
-33
V_OH@MAX = 3.135 V
Output Low Current
I_OL
V_OL @ MIN = 1.95 V
30
V_OL @ MAX = 0.4 V
Rise Time
t_{r_USB}
V_OL = 0.4 V, V_OH = 2.4 V
0.5
Fall Time
t_{f_USB}
V_OH = 2.4 V, V_OL = 0.4 V
0.5
Duty Cycle
d_t1
V_T = 1.5 V
45
Group Skew
t_skew
V_T = 1.5 V
Jitter, Cycle to cycle
t_jcyc-cyc
V_T = 1.5 V
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%, CL = 5 pF with Rs = 33Ω (unless otherwise specified)
1_{Guaranteed by design and characterization, not 100% tested in production.}
2_{ICS recommended and/or chipset vendor layout guidelines must be followed to meet this specification}
MAX
100
20.8344
11.4580
11.4580
0.55
-33
38
1.5
1.5
55
250
130
UNITS
ppm
ns
ns
ns
V
V
mA
mA
mA
mA
ns
ns
%
ps
ps
NOTES
1,2
2
2
2
1
1
1
1
1
1
1
1
1
1
1,2
IDT^TM/ICS^TM System Clock Chip for ATI RS/RD600 series chipsets using AMD CPUs
7
1377A—04/07/08